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Schematic of [Multi-layer] JLCPCB Constraints 69c2
DS1
T6
T2
SW1
U4
D5
FS1
T9
D4
FS3
FS2
LED2
T13
R6
Resistance
1kΩ
T4
Q1
T11
C1
Capacitance
Capacitance
C11
Capacitance
1uF
R3
Resistance
1kΩ
T5
R4
Resistance
1kΩ
SW2
R2
Resistance
1kΩ
T1
C12
Capacitance
1uF
LED1
R5
Resistance
1kΩ
T12
T3
R1
Resistance
1kΩ
T10
R8
End of Life
D12
R7
End of Life
D10
D11
D13
D9
U8
C10
Capacitance
100uF
Y1
D3
D2
U10
C9
Capacitance
100uF
D1
R1
Resistance
500 Ω
D8
D6
D7
U9
U5
S1
T8
L1
Inductance
Inductance
T7
C1
Capacitance
100pF
U1
LED3
BZ2
J3
J1
J2

[Multi-layer] JLCPCB Constraints 69c2