# [2-layer] OSHPARK Constraints ## Description Use this template if you're planning to get your board manufactured in OSHPARK. It has the via min/max and trace width constraints already baked as global rules. #project-template #template #manufacturer-design-rules ## Project Details - **Owner:** joshbuttemer - **Created:** 9/28/2024 - **Last Updated:** 9/28/2024 - **Visibility:** Public ## Key Components ### BATT1 — [1070TR](https://www.flux.ai/jharwinbarrozo/1070tr~eit.md) - Voltage: 3V - Datasheet URL: https://www.keyelco.com/userAssets/file/M65p5.pdf - Manufacturer Name: Keystone Electronics - Manufacturer Part Number: 1070TR **Pins:** - - [pin 2] - + [pin 1] *The full schematic, PCB layout, bill of materials, and interactive design are available at [https://www.flux.ai/joshbuttemer/2-layer-oshpark-constraints~b9](https://www.flux.ai/joshbuttemer/2-layer-oshpark-constraints~b9).* --- *Generated from [https://www.flux.ai/joshbuttemer/2-layer-oshpark-constraints~b9](https://www.flux.ai/joshbuttemer/2-layer-oshpark-constraints~b9)*