Mobile EV Charger Control Board Design

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I’ll open the attached text file and apply its instructions to the current schematic workflow if it contains design requirements.

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Created the dedicated CAN Sheet / CAN_COMM schematic section for CAN FD x2 using ISO1042-family isolated CAN FD transceivers, selectable 120Ω termination, common-mode chokes, TVS/ESD protection, external connectors, and separated logic/field-side isolated nets. ERC/passive/component checks show no current errors or warnings.
Notes: CAN Sheet Design Notes
Estimated time saved vs. manual EDA workflow: ~4–6 hours.
Open items:
  • Confirm dedicated isolated 5V field-side supply source for each CAN channel before layout.
  • Confirm CAN connector pinout/order before manufacturing documentation.
Suggested next steps:
  1. Create the dedicated RS485 Sheet.
  2. Create the SECC Sheet.
  3. Create the IMD Sheet.
  4. Create SAFETY, OUTPUT DRIVER, and ANALOG SENSING sheets.
Create next sheets
Create RS485 sheet
Create SECC sheet
Create IMD sheet
Review sheet structure
Explain CAN isolation

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MCU Section Design Notes — STM32H743ZIT6
Scope
Detailed schematic-only MCU support section for URIMKOREA UR-150K control board. PCB layout was not created.
Main Parts Added / Confirmed
  • U8 — STM32H743ZIT6, LQFP-144 industrial MCU
  • U9 — MT25QL128ABA1ESE-0SIT, 128Mbit QSPI NOR flash
  • U10 — AT24C256C-SSHL-B, 256Kbit I2C EEPROM
  • U11 — KSZ8081RNA RMII Ethernet PHY
  • J2 — RJ45 MagJack with integrated magnetics
  • U12, IC1 — TCAN1462DRQ1 CAN FD transceivers
  • U14, U13 — MAX14783ExS RS485 transceivers
  • J3 — 10-pin ARM SWD/JTAG connector
  • SW1 — manual NRST pushbutton
  • JP1 — BOOT0 firmware-recovery jumper
  • J4 — USB OTG connector
  • D2 — USBLC6-2SC6 USB ESD array
  • D3–D7 — PESD1CAN ESD/TVS protection for Ethernet/CAN/SWD differential or exposed lines
Power and Grounds
  • MCU digital supply: ISO_3V3_MCU
  • MCU digital ground: ISO_GND
  • MCU analog supply: VDDA_3V3_A, filtered from ISO_3V3_MCU through FB1
  • MCU analog ground: ISO_AGND
  • VBAT is tied to ISO_3V3_MCU for no-backup-battery operation.
  • VDDUSB is tied to ISO_3V3_MCU for USB FS operation.
  • VCAP1 and VCAP2 each have 2.2µF low-ESR capacitors and are not tied to external supply.
  • Each STM32 VDD pin has a local 100nF decoupling capacitor plus 4.7µF rail bulk capacitance per ST reference guidance.
Clocks
  • Y2 8MHz HSE crystal: MCU_HSE_IN, MCU_HSE_OUT, load capacitors C33/C34
  • Y3 32.768kHz LSE crystal: MCU_LSE_IN, MCU_LSE_OUT, load capacitors C35/C36
  • Y1 25MHz Ethernet PHY crystal: ETH_XI_25M, ETH_XO_25M, load capacitors C31/C32
Boot and Reset
  • BOOT0 has a 10kΩ pull-down (R7) for normal flash boot.
  • JP1 connects BOOT0 to ISO_3V3_MCU when shunted for firmware recovery / system bootloader mode.
  • MCU_NRST is pulled up by R6, has reset capacitor C37, is driven by reset supervisor U7, is connected to SWD reset, and can be pulled low by reset pushbutton SW1.
  • PDR_ON is tied to ISO_3V3_MCU.
Interface Pin Map

Table

FunctionNetSTM32 Pin
QSPI CLKQSPI_CLKPB2
QSPI NCSQSPI_NCSPB6
QSPI IO0QSPI_IO0PF8
QSPI IO1QSPI_IO1PF9
QSPI IO2/WPQSPI_IO2_WPPF7
QSPI IO3/HOLDQSPI_IO3_HOLDPF6
I2C1 SCLI2C1_SCLPB8
I2C1 SDAI2C1_SDAPB9
Ethernet REF_CLKETH_RMII_REF_CLKPA1
Ethernet MDIOETH_MDIOPA2
Ethernet MDCETH_MDCPC1
Ethernet CRS_DVETH_CRS_DVPA7
Ethernet RXD0/RXD1ETH_RXD0, ETH_RXD1PC4, PC5
Ethernet TX_ENETH_TX_ENPB11
Ethernet TXD0/TXD1ETH_TXD0, ETH_TXD1PG13, PG14
CAN1 TX/RXFDCAN1_TX, FDCAN1_RXPD1, PD0
CAN2 TX/RXFDCAN2_TX, FDCAN2_RXPB13, PB12
RS485-1 TX/RX/DERS485_1_TX, RS485_1_RX, RS485_1_DE_REPD5, PD6, PD4
RS485-2 TX/RX/DERS485_2_TX, RS485_2_RX, RS485_2_DE_REPD8, PD9, PD10
USB FS DM/DPUSB_OTG_DM, USB_OTG_DPPA11, PA12
UART1 TX/RXUART1_TX, UART1_RXPA9, PA10
UART3 TX/RXUART3_TX, UART3_RXPC10, PC11
UART4 TX/RXUART4_TX, UART4_RXPA0, PC2
UART6 TX/RXUART6_TX, UART6_RXPC6, PC7
SPI1 SCK/MISO/MOSI/NSSSPI1_SCK, SPI1_MISO, SPI1_MOSI, SPI1_NSSPA5, PA6, PB5, PA4
SWDIO/SWDCLK/SWO/JTDISWDIO, SWDCLK, SWO, JTDI_OPTIONPA13, PA14, PB3, PA15
Verification
ERC/passive/component checks were run after completing support circuitry. No current error or warning checks remained for the requested review set.
Open Items Before PCB Layout
  • Confirm exact Ethernet PHY strap resistor requirements and LED wiring if Ethernet status LEDs are required.
  • Confirm ESD device placement near external connectors during layout.
  • Revisit UART/SPI header silkscreen labels before manufacturing documentation.

  • Scope

  • Main Parts Added / Confirmed

  • Power and Grounds

  • Clocks

  • Boot and Reset

  • Interface Pin Map

  • Verification

  • Open Items Before PCB Layout

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