Yes — your uploaded image shows the AITRIP header labels clearly, so the terminal names should be updated to match these labels rather than the Pololu naming. The visible labels are:
Table
Left side
Right side
PWMA
VM
AIN2
VCC
AIN1
GND
STBY
AO1
BIN1
AO2
BIN2
BO2
PWMB
BO1
GND
GND
That mapping comes directly from the image you uploaded
Because this is a part project, the recommended workflow is to audit the existing terminal elements, compare them against the actual board pinout, then rename the terminal labels and update pin properties only where needed — and not guess any pin numbers
Since you do not have edit access to this published project, the right next step is to clone it and retarget the terminal names there: