graph TD;
    A[Input: A] --> |SN74LS48N| $\overline{RBI}$[$\overline{RBI}$: Pin 5]
    B[Input: B] --> |SN74LS48N| $\overline{RBI}$
    C[Input: C] --> |SN74LS48N| $\overline{RBI}$
    D[Input: D] --> |SN74LS48N| $\overline{RBI}$
    E[Enable: $\overline{LT}$] --> |SN74LS48N| $\overline{RBI}$
    G[Output: $\overline{BI}/\overline{RBO}$] -.-> |SN74LS48N| $\overline{RBI}$

    $\overline{BI}/\overline{RBO}$ --> Display[7-Segment Display]

    style $\overline{RBI}$ fill:#f9f,stroke:#333,stroke-width:4px;
    style $\overline{BI}/\overline{RBO}$ fill:#f96,stroke:#333,stroke-width:2px;

• Input A, B, C, D: Represent the BCD (Binary-Coded Decimal) inputs.
• Enable $\overline{LT}$: Represents the lamp test input.
• Output $\overline{RBI}$: Connected to the base pin of the internal circuit where $\overline{BI}/\overline{RBO}$ is involved.
• Output $\overline{BI}/\overline{RBO}$: Communicates with the 7-segment display.