LoRa Frequency Converter PCB Design
Thought for 17 sec
I’ll re-check the live DRC, then try to clear what’s fixable now. Since the current errors are RF/LO airwires caused by removing the temporary traces, I’ll first see whether the stale routing job has cleared; if it has, I’ll route, otherwise I’ll document the blocker and avoid making a fake connectivity-only fix.
Worked for 31 sec
I’m blocked by credits before I can make further tool changes.
Current live state:
- RF/LO rules were restored to the intended manufacturing values: 2.9 mm RF/LO trace width, 1 mm keepout, top-layer routing.
- Temporary narrow RF/LO traces were removed.
- Current DRC has 13 RF/LO airwire errors and 1 overlapping copper error.
- The board is therefore not manufacturing-ready yet.
- A previous stale/timed-out autorouting job had also blocked the RF-width autoroute attempt earlier.
What remains:
- Clear/discard the stale active routing job if it is still present.
- Fix the overlapping copper error first.
- Route the 13 RF/LO airwires with the restored 2.9 mm top-layer RF geometry.
- Re-run DRC until airwires/overlaps are zero.
- Replace placeholder SBL-1+ and SMA footprints with exact manufacturer footprints before final fabrication release.
Fix overlap first
List RF airwires
Clear routing job
Check exact footprints
Rerun DRC
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Project Specification — 170-27 MHz LoRa Converter
Purpose
Design an 80 mm × 50 mm, 2-layer PCB that converts an Ikoka MeshCore stick using an EBYTE E22-170M / SX1262 170 MHz LoRa radio to operate through a 27 MHz antenna using passive bidirectional frequency conversion.
Architecture
- Passive double-balanced mixer: Mini-Circuits SBL-1+.
- TX path: J1 Ikoka SMA → 170 MHz band-pass filter → SBL-1+ RF port → SBL-1+ IF port → 27 MHz band-pass filter → J2 antenna SMA.
- RX path: J2 antenna SMA → 27 MHz BPF → SBL-1+ IF port → SBL-1+ RF port → 170 MHz BPF → J1 Ikoka SMA.
- Local oscillator: Adafruit Si5351A breakout, CLK0 programmed to 143.000 MHz, feeding the SBL-1+ LO port through C5 and a 3 dB π-pad.
- Temporary programming: Arduino Nano Every footprint only; board also includes standalone +5 V input connector.
Required Board Constraints
- Board: 80 mm × 50 mm rectangle.
- Stackup: 2 layers, 1 oz copper, 1.6 mm FR4, εr = 4.5.
- Top layer: components and signal routing.
- Bottom layer: solid uninterrupted GND plane; no bottom routing except ground fills/thermal reliefs.
- RF traces: 50 Ω microstrip; requested trace width ≈ 2.9 mm on 1.6 mm FR4.
- Minimum non-RF trace width: 0.2 mm.
- Minimum via drill: 0.3 mm, RF stitch via pad 0.6 mm.
- Finish: HASL or ENIG; solder mask and silkscreen both sides.
Critical RF Layout Rules
- Main RF path must be straight: J1 → 170 MHz BPF → SBL-1+ RF → SBL-1+ IF → 27 MHz BPF → J2.
- Main RF path total length target: <30 mm; each RF segment between parts <10 mm.
- No right-angle RF bends; use straight routing or 45° mitered corners only.
- LO injection must approach SBL-1+ LO pin perpendicular to the main RF path.
- Ground stitching vias every 5 mm max around RF traces.
- Keep 1 mm clear of RF traces except their own ground stitching vias.
- SBL-1+ pins 2, 4, 6, 7, 8 each get dedicated GND via/plane connection; do not daisy-chain.
- SBL-1+ courtyard: 3 mm clearance all sides.
BOM / Component Requirements
- U1: Mini-Circuits SBL-1+, SOT-115 Micro-X, 8-lead mixer.
- U2: Adafruit 5640 Si5351A clock generator breakout, represented as 6-pin 2.54 mm header: VIN, GND, SDA, SCL, CLK0, spare.
- L1-L4: Bourns 9230-94-RC, 100 nH axial inductors.
- C1, C2, C5: KYOCERA AVX SR151A100JARTR1, 10 pF C0G/NPO radial capacitors.
- C3, C4: KEMET C317C331J1G5TA7301, 330 pF C0G/NPO radial capacitors. Note: build guide table has a quantity typo showing 4; schematic uses two parts C3 and C4.
- C6, C7: KEMET C321C104M5U5TA, 100 nF radial decoupling.
- C8: KEMET C315C104M5U5TA, 100 nF Si5351 VIN bypass.
- R1, R3: Stackpole CF14JT270R, 270 Ω 1/4 W axial shunt resistors for LO π-pad.
- R2: Stackpole CF14JT18R0, 18 Ω 1/4 W axial series resistor for LO π-pad.
- J1, J2: TE Connectivity CONSMA020.062-G edge-mount SMA female connectors.
- J3: 2×15 through-hole 2.54 mm Arduino Nano Every programming header, not permanently populated.
- J4: 2-pin JST-PH 2.0 mm +5 V input connector.
- D1/R4: 3 mm through-hole red LED + 470 Ω resistor for 5 V power indication.
Main Nets
- RF_170_IN: J1 center to L1.
- RF_170_MID: L1/L2 junction with C1/C2 shunt filter nodes as specified.
- RF_170_MIXER: L2 to U1 RF+.
- RF_27_MIXER: U1 IF+ to L3.
- RF_27_MID: L3/L4 junction with C3/C4 shunt filter nodes as specified.
- RF_27_ANT: L4 to J2 center.
- LO_CLK0: U2 CLK0 to C5 input.
- LO_PAD_IN: C5 output / R1 shunt / R2 input.
- LO_PAD_OUT: R2 output / R3 shunt / U1 LO+.
- I2C_SDA: U2 SDA to J3 A4/SDA.
- I2C_SCL: U2 SCL to J3 A5/SCL.
- 5V: J3 +5V and J4 +5V to U2 VIN and decoupling/LED circuit.
- GND: bottom plane and all SMA shields, mixer ground pins, shunts, capacitors, headers.
Power Budget
No onboard regulator. External 5 V source powers only the Si5351A breakout and LED indicator. Design connector and 5 V traces with margin for at least 200 mA even though expected current is much lower.
Firmware / Programming Notes
Si5351A CLK0 must be programmed to 143.000 MHz with 8 mA drive. Arduino Nano Every is temporary/programming only and should be removed after setup; final board uses J4 +5 V input.
Silkscreen Required
- Board title: “170↔27 MHz LoRa Converter v1.0”.
- J1: “TO IKOKA” and “170 MHz LoRa IN/OUT”.
- J2: “27 MHz ANTENNA” and “27 MHz LoRa IN/OUT”.
- U1: “SBL-1+ MIXER”.
- Between J1 and U1: “170 MHz BPF”.
- Between U1 and J2: “27 MHz BPF”.
- Near LO path: “143 MHz LO”.
- J3: “PROG ONLY — REMOVE AFTER PROGRAMMING”.
- J4: “+5V IN / GND”.
Datasheet / Verification Notes
Before finalizing schematic, verify SBL-1+ pinout and recommended LO/RF/IF usage, Si5351A breakout power and output limits, SMA connector footprint, and passive/package dimensions against part data.
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