Project Specification
Project Overview
Four-layer cabled carrier for the LILYGO T-Embed CC1101. Status: engineering prototype / constrained by host exposure.
Intended Use
Lawful RF receive/transmit experimentation, remote-control capture/replay where permitted, and IR bring-up. Intentional jamming is out of scope.
What the Device Should Do
- Host two plug-in nRF24L01+ modules and one second plug-in CC1101 module.
- Provide high-power IR transmit and 38 kHz IR receive.
- Provide protected 5 V input, local 3.3 V regulation, test/expansion access, and safe boot defaults.
System Architecture
See the Block Diagram project file. Because only GPIO8, GPIO18, GPIO43, and GPIO44 are physically exposed, the carrier uses GPIO8/GPIO18 I2C with SC18IS606 I2C-to-SPI and PCA9555 GPIO expansion. The requested direct GPIO assignments are not used.
Verified Host Interface
Official repository documentation identifies only two Qwiic connectors (3V3, GND, GPIO8 SDA, GPIO18 SCL) and UART connector (3V3, GND, GPIO43 TX, GPIO44 RX). GPIO18 is already shared with onboard PN532/BQ27220/BQ25896. GPIO43/44 are shared UART and the official external-nRF example's CE/CS. No documented exposed GPIO10/11/12/13/16/17/35/36/40/41/42 connector exists.
The carrier therefore uses a manufacturable JST-SH Qwiic cable. It is not a stacking footprint. No mounting holes are copied because sourced hole coordinates were not verified.
Power
Dedicated 5 V/2 A JST-PH input; no reliance on the undocumented current capacity of host 3V3. 1.1 A hold PPTC, TVS, AOZ1280CI 1.2 A buck at 3.3 V. Host 3V3 is sense/reference only and must not be tied to carrier 3V3.
RF and Antennas
- nRF24 modules retain their own antennas. No parallel RF connector.
- J6 is DNP and electrically NC: use only after selecting a CC1101 module that exposes a documented 50-ohm RF pin and a matching topology. Standard 2x4 CC1101 modules normally carry their own antenna/SMA, so populating J6 without redesign is prohibited.
- No ESP32 U.FL provision: the standard host does not expose a documented ESP32 RF feed/zero-ohm antenna-selection point. Use the official external-antenna T-Embed variant or perform a separately documented host modification.
Physical Design
100 × 45 mm maximum, 2 mm corner radius, Top signal/components, Inner1 GND, Inner2 power, Bottom signal. Radio sockets are edge-oriented with antenna keepouts; no host mechanical-mating claim is made.
Firmware-Relevant Requirements
Host communicates with SC18IS606 and PCA9555 over Qwiic I2C. Firmware must serialize access to the shared SPI bus, initialize all chip selects high, CE low, and IR TX low before enabling radio power/traffic.
Manufacturing and Assembly
JLCPCB-oriented SMD passives and real active MPNs. Plug-in radio modules and through-hole connectors are post-assembly. J6 DNP. Inspect module pin-1 orientation before insertion.
Done Criteria and Residual Limits
Schematic, four-layer board, placement, routing and checks are required. Exact host stacking/mounting geometry and direct requested GPIO mapping are intentionally omitted because they are not physically documented as exposed.