User-authoritative module allowance: 445 mA maximum at 3.3 V. Existing buck topology and support values are retained; this is a schematic capacity check, not a transient or thermal qualification. U1 LMR33630BDDA is rated 3 A. R1=100 kΩ and R2=43.2 kΩ with 1 V typical feedback give 3.3148 V nominal.

MAX3485 enabled no-load current is 2.2 mA maximum. The 54 Ω loaded-bus bound intentionally ignores series-resistor and driver drops; it is a planning assumption, not a measured bus current. The earlier no-load-only transceiver budget omitted driven termination current. Driver fault currents and external bus fault power are abnormal-operation tests, not included in this normal-load budget.

The 600 mA allowance is 20% of the regulator's 3 A rating; adequate schematic current headroom remains. Existing L1 is 2.2 µH with 4.05 A typical 10%-drop saturation current and 6.2 A thermal-performance current. At the former 19.13 V / 1.2 MHz planning point, nominal-L ripple is approximately 1.034 A p-p, giving approximately 1.117 A peak at 600 mA output; at −20% L the peak is approximately 1.246 A. Layout and thermal verification remain pending.

Connectivity inspection: U1 SW -> L1 -> 3V3 feeds U2 pin14, U3 VCC, LED resistor and pull-ups. U2 pin13 returns to GND. Retain C11=100 nF and C12=10 µF local module bypass, C10=100 µF rail bulk and C8/C9=22 µF each. The nominal shared rail total is 154.2 µF including C13; effective ceramic capacitance is lower with DC bias. No manufacturer T1-U local-supply capacitor requirement was found in the retrieved HTML text; retained capacitance needs bench load-step confirmation at U2. Do not confuse the datasheet's ADC 100 nF filter recommendation with a supply-bypass requirement.

Assumptions: isolated Class 2 12 VAC, low line10.8 VAC, high-line/no-load14.52 VAC, bridge drop1.4 V, sensor0.5 W, buck efficiency85%, C1+C2=940 µF, 50 Hz mains, source capacitor-input RMS factor2.0. At 3.315 V /600 mA the rail uses1.989 W; buck input2.34 W plus sensor0.5 W gives2.84 W. Conservative RMS source estimate=2×2.84/10.8=0.526 A. A12 VAC1 A listed/Class2 source remains preferred.

Using a constant-power capacitor-discharge planning approximation gives an approximately11.17 V low-line trough and19.13 V high-line no-load peak, within the9–24 V sensor range under these assumptions. Transformer regulation/impedance, bridge temperature, capacitance tolerance and dynamic loads require physical verification.

F1 hold-current margin at60°C:0.73 A reference hold against0.526 A estimate. This is only1.39×, below the1.5× conservative protection-sizing target; do not silently declare full hot-environment power-path qualification. F1 is not changed in this module-migration scope; review ambient/derating in the overall design. Bridge capacitor-load derated0.64 A planning rating remains above the estimate, but RMS and average ratings are not interchangeable and thermal testing is mandatory.

Measure source RMS current, RECT_DC trough/peak, U2 rail startup and Wi-Fi droop, and U1/L1/BR1/F1 temperatures. Verify3.0–3.6 V at U2 for worst-case operating load and source limits. Confirm ceramic effective capacitances from production MPN curves. PCB current/thermal routing and manufacturing release remain deferred.