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Board-to-Board Connector Pin Allocation
Purpose
This document defines the initial board-to-board connector pin allocation between the real-time control board and the upper control board for the EV charger project. The goal is to reserve a practical and reviewable signal map that supports requirements capture, schematic capture planning, and later connector selection.
This is an architectural allocation document, not a final footprint or connector MPN decision. Final connector family, current rating, insulation system, pin pitch, shielding, and creepage/clearance suitability must be confirmed during detailed schematic and layout design.
Scope
The connector allocation covers:
  • Power and ground distribution between boards
  • Safety and charge control signals
  • Board health and fault reporting
  • A primary board-to-board data channel
  • Reserved pins for bring-up, debug, and future expansion
System Context
The EV charger architecture uses two logical controller domains:
  • Real-time control board: safety interlocks, CP/PP evaluation, contactor control, measurement, protection, and immediate shutdown behavior
  • Upper control board: network services, higher-level control, user-facing logic, logging, and supervisory charging commands
The board-to-board connector must therefore support both:
  • deterministic control/status exchange
  • serviceability and future protocol evolution
Connector Architecture Recommendation
Use one primary board-to-board connector group with the following logical partitions:
  1. Power and return pins
  2. Critical discrete control/status pins
  3. Primary serial communication pins
  4. Optional service/debug pins
  5. Reserved expansion pins
For early design, keep safety-critical sensing local to the real-time control board and only export evaluated status or permission signals unless a clear system-level reason exists to do otherwise.
Initial Pin Allocation Table

Table


PinSignal NameDirectionDomainTypeDescription
1B2B_24VUpper -> RTPowerPower24 V board-to-board supply input to real-time board
2B2B_24V_RETRT -> UpperPowerReturn24 V return paired with supply path
3B2B_5V_AUXUpper -> RTPowerPowerOptional auxiliary 5 V rail if required by architecture
4B2B_5V_RETRT -> UpperPowerReturn5 V return
5B2B_GND_1BidirectionalGroundGroundDigital/reference ground
6B2B_GND_2BidirectionalGroundGroundAdditional ground pin for return integrity
7B2B_GND_3BidirectionalGroundGroundAdditional ground pin for return integrity
8CHARGE_ENABLEUpper -> RTControlDiscreteCharge permission from upper board
9CHARGE_STOPUpper -> RTControlDiscreteExplicit stop request
10RESET_FAULTUpper -> RTControlDiscreteNon-latched fault reset request
11RT_READYRT -> UpperStatusDiscreteReal-time board initialized and operational
12CHARGING_ACTIVERT -> UpperStatusDiscreteCharging currently active
13CONTACTOR_STATERT -> UpperStatusDiscreteMain contactor state indication
14PROTECTION_TRIPRT -> UpperStatusDiscreteSummary trip output for immediate supervisor awareness
15UART_TX_RTRT -> UpperDataUARTReal-time board transmit
16UART_RX_RTUpper -> RTDataUARTReal-time board receive
17HEARTBEAT_RTRT -> UpperStatusDiscreteOptional watchdog/heartbeat pulse
18COMM_ENABLEUpper -> RTControlDiscreteCommunication channel enable or wake control
19CURRENT_LIMIT_REQ_0Upper -> RTControlReservedOptional discrete current-limit encoding bit 0
20CURRENT_LIMIT_REQ_1Upper -> RTControlReservedOptional discrete current-limit encoding bit 1
21CP_STATE_0RT -> UpperStatusReservedOptional discrete CP state bit 0
22CP_STATE_1RT -> UpperStatusReservedOptional discrete CP state bit 1
23FAULT_SUMMARY_0RT -> UpperStatusReservedOptional discrete summary fault bit 0
24FAULT_SUMMARY_1RT -> UpperStatusReservedOptional discrete summary fault bit 1
25DBG_TXRT -> UpperDebugUARTOptional debug serial transmit
26DBG_RXUpper -> RTDebugUARTOptional debug serial receive
27SERVICE_MODEUpper -> RTControlDiscreteOptional service mode request
28RESERVED_1TBDReservedReservedFuture expansion
29RESERVED_2TBDReservedReservedFuture expansion
30RESERVED_3TBDReservedReservedFuture expansion
Minimum Required Pins for First Hardware Revision
If connector pin count must be reduced, keep at least the following:
  • B2B_24V
  • B2B_24V_RET
  • B2B_GND_1
  • B2B_GND_2
  • CHARGE_ENABLE
  • CHARGE_STOP
  • RT_READY
  • CHARGING_ACTIVE
  • PROTECTION_TRIP
  • UART_TX_RT
  • UART_RX_RT
Signal Group Notes
Power and Ground
  • Provide multiple ground pins before adding optional feature pins.
  • If the 5 V rail is not exported, remove B2B_5V_AUX and B2B_5V_RET and convert those pins to extra ground or reserved pins.
  • Final current through board-to-board power pins must be reviewed against connector contact rating and temperature rise.
Critical Control and Status
  • CHARGE_ENABLE should be treated as the supervisory permission input.
  • CHARGE_STOP should remain separately visible even if equivalent functionality exists in the serial protocol.
  • PROTECTION_TRIP is useful as a fast summary signal independent of packet parsing.
Data Channel
  • Use one primary serial channel first. UART is acceptable for first revision if trace length, noise environment, and isolation strategy remain manageable.
  • If later changed to CAN, repurpose the same logical slot pair to B2B_CAN_H and B2B_CAN_L and keep nearby ground reference pins.
Debug and Service
  • Keep debug pins available during prototype stages even if they are not populated in production.
  • SERVICE_MODE should be protected against accidental assertion in production systems.
If the project decides to use CAN instead of UART between boards, reassign:
  • Pin 15 -> B2B_CAN_H
  • Pin 16 -> B2B_CAN_L
  • Pin 17 -> CAN_STBY or keep HEARTBEAT_RT
  • Pin 18 -> CAN_WAKE or COMM_ENABLE
In that case, discrete status pins may be reduced later if the system demonstrates reliable startup and fault reporting over CAN.
Allocation Rules
  • Keep power, return, and ground pins grouped together physically.
  • Keep UART or CAN pins adjacent to at least one ground reference pin where practical.
  • Place critical discrete control signals before optional diagnostics.
  • Do not export raw safety sensor analog signals to the upper board unless there is a strong system requirement.
  • Keep protection evaluation local to the real-time board and export evaluated states.
Open Items
  • Final choice of UART vs CAN for board-to-board communication
  • Whether 5 V must be exported across boards
  • Whether discrete CP state pins are needed in addition to serial reporting
  • Whether fault summary should remain a single fast hardware pin only or also use multiple discrete fault outputs
  • Final connector family, pitch, pin count margin, creepage, and locking method
Review Checklist
  • Confirm board-to-board link protocol choice
  • Confirm required power rails shared between boards
  • Confirm which discrete pins remain mandatory even when serial link is present
  • Confirm production vs bring-up population strategy for debug pins
  • Confirm connector current rating and environmental robustness
  • Confirm pin assignment consistency with the net naming convention document
Exit Criteria
This document is ready for the next phase when:
  • the board-to-board protocol is selected
  • mandatory pins are frozen
  • optional and debug pins are clearly marked
  • connector family selection can begin with electrical pin count and grouping already defined
  • Purpose

  • Scope

  • System Context

  • Connector Architecture Recommendation

  • Initial Pin Allocation Table

  • Minimum Required Pins for First Hardware Revision

  • Signal Group Notes

  • Power and Ground

  • Critical Control and Status

  • Data Channel

  • Debug and Service

  • Alternate Mapping Option: CAN-Based Board Link

  • Allocation Rules

  • Open Items

  • Review Checklist

  • Exit Criteria