Ripple Lightstrip Schematic

flux

Got it — I’ll incorporate the two-rail power architecture and the specified GPIO17 high-side switch logic before adding/wiring parts.

flux

I’ve updated the spec with separate 5V_SYS and 5V_STRIP rails and the active-high GPIO17 switch behavior. I’ll now choose parts around that architecture and keep the XIAO isolated from the switched rail.I’m blocked because there are no available ACUs, so I can’t continue executing project edits right now.
Accomplished so far:
  • Renamed the project to Ripple Lightstrip Mini Controller.
  • Updated the project description.
  • Created and updated the Project Specification with your requirements.
  • Integrated the latest change: separate 5V_SYS always-on rail and 5V_STRIP switched strip rail, with GPIO17/D7 active-high strip control logic.
Still remaining:
  • Select Flux/JLCPCB-friendly parts for the XIAO headers, 74AHCT125, MOSFETs, fuse, TVS, terminals, buttons, LED, and passives.
  • Add all schematic components.
  • Wire nets: 5V_IN, 5V_SYS, 5V_STRIP, GND, LED_DATA_3V3, LED_DATA_5V.
  • Verify the GPIO17 switch truth table.
  • Run schematic/ERC review and fix issues.
  • Later: PCB layout with XIAO antenna at board edge and copper keepout.
Add, wire, review
Find MOSFETs
Document rail split
Verify switch logic
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Project Specification: Ripple Lightstrip Mini Controller
Project Overview
Status: Draft schematic in progress.
Ripple Lightstrip Mini Controller is a compact production-intent controller board for 5 V addressable LED strips such as WS2812B and WS2815 data-input variants. The controller uses a socketed Seeed Studio XIAO ESP32-C6 module and provides protected high-current strip power plus 5 V logic-level LED data output.
Intended Use
  • Hobbyist/prototype-to-production LED strip controller.
  • External 5 V DC supply powers the controller and strip.
  • Target load: up to 150 WS2812B LEDs, approximately 10 A maximum at 5 V.
What the Device Should Do
  • Accept 5 V DC input via screw terminal.
  • Protect against reverse polarity, overcurrent, and transients.
  • Switch the LED strip 5 V rail under firmware control.
  • Shift ESP32-C6 3.3 V LED data to 5 V-compatible logic.
  • Provide two user buttons and one status LED.
Main Features
  • Seeed Studio XIAO ESP32-C6 module on two 7-pin female headers.
  • 10 A-class 5 V strip power path.
  • P-channel MOSFET reverse-polarity input protection.
  • Fuse or resettable overcurrent protection around 10 A.
  • SMAJ5.0A TVS diode across protected 5 V input.
  • 1000 uF / 10 V electrolytic bulk capacitor near LED strip output.
  • 74AHCT125 level shifter with 470 ohm series data resistor.
  • High-side P-channel MOSFET strip power switch controlled by XIAO D7 / GPIO17.
  • LED data from XIAO D3 / GPIO21.
  • Status LED on a spare GPIO.
  • Buttons to GND on GPIO2 and GPIO1 with pull-ups.
System Architecture
Diagram



  
    
  
  
    
  

























5V DC screw terminal
Reverse polarity, fuse, TVS
5V_SYS always on rail
High-side strip power switch
XIAO ESP32-C6 socket
5V_STRIP switched rail
LED strip node_5V output
74AHCT125 level shifter
470 ohm data resistor
LED strip DATA output
Status LED and buttons
1000uF output bulk capacitor
Hardware Subsystems
Power Input and Protection
  • 5 V DC input connector rated for 10 A or higher.
  • Reverse-polarity protection with low-loss P-channel MOSFET.
  • 10 A-class fuse or resettable fuse. Note: PTC devices may have unacceptable voltage drop at 10 A; blade fuse or low-resistance fuse holder is preferred for final production.
  • SMAJ5.0A TVS diode from protected 5 V to GND.
  • Net labels required: 5V_IN, 5V_SYS, 5V_STRIP, GND.
  • 5V_SYS is always on and powers the XIAO 5V/VBUS pin directly from the protected input.
  • The XIAO ESP32-C6 module must never be powered from 5V_STRIP.
Strip Power Switch
  • High-side P-channel MOSFET rated for at least 10 A with low RDS(on).
  • 5V_STRIP is switched and feeds only the LED strip 5 V screw-terminal output.
  • Gate controlled from XIAO D7 / GPIO17 using an N-channel low-side gate driver.
  • Required logic: GPIO17 HIGH = strip ON; GPIO17 LOW = strip OFF.
  • GPIO17 connects through 100 ohm to the N-FET gate.
  • N-FET gate has 100k pulldown to GND.
  • N-FET drain pulls the P-FET gate low through 10k.
  • P-FET gate has 100k pull-up to its 5V_SYS/source node so the strip defaults OFF during reset.
Level Shifter and Data Output
  • 74AHCT125 powered from 5 V.
  • LED data input from XIAO D3 / GPIO21.
  • Net labels required: LED_DATA_3V3 before the level shifter and LED_DATA_5V after the level shifter.
  • One buffer channel used; unused channels tied to safe states or marked no-connect as appropriate.
  • 470 ohm series resistor after the level shifter before LED strip DATA terminal.
XIAO Module
  • Socketed with two 7-pin female headers.
  • XIAO onboard antenna edge must be placed at board edge in PCB layout with no copper underneath/near antenna keepout.
User I/O
  • Two tactile buttons to GND using GPIO2 and GPIO1 with pull-ups.
  • One status LED with 1 kΩ series resistor on a spare GPIO.
Interfaces and Connections

Table

InterfaceConnector/SignalNotes
Power input5V_IN, GND5 V DC, up to 10 A
Always-on rail5V_SYS, GNDProtected 5 V rail feeding XIAO and logic
Switched strip rail5V_STRIP, GNDHigh-current rail feeding only LED strip 5 V output
LED strip output5V_STRIP, LED_DATA_5V, GND3-position screw terminal
LED dataXIAO GPIO21 / D3 / LED_DATA_3V3Shifted to 5 V through 74AHCT125
Strip enableXIAO GPIO17 / D7Controls high-side switch
ButtonsGPIO2, GPIO1Active-low to GND
Status LEDSpare GPIOActive-high preferred unless pin choice requires otherwise
Power and Runtime Expectations
  • External 5 V supply must be capable of LED load current.
  • Controller electronics are small relative to strip current; LED rail dominates power budget.
  • No battery runtime requirement.
Power Tree and Power Budget

Table

RailLoadEstimated Current
5V inputLED strip, 150 WS2812B at full whiteup to ~9 A
5V inputControl electronics and margin~0.2-0.5 A
5V protected pathDesign target10 A max
5V_SYSXIAO 5V/VBUS and logicalways on, low current vs strip
5V_STRIPLED strip screw terminalswitched, up to 10 A
5V logic74AHCT125<10 mA typical
XIAO 3V3 internal railESP32-C6 modulepowered by XIAO onboard regulation from 5V/VBUS if available
Sizing target: connectors, fuse, MOSFETs, and copper must be designed for at least 10 A continuous with thermal margin. PCB layout must use wide copper pours/planes rather than narrow traces for LED power.
Manufacturing and Assembly Expectations
  • Prefer JLCPCB-assembly-friendly SMD parts where available.
  • Passives preferred 0603/0805.
  • XIAO mounted with female headers and removable module.
  • Screw terminals should be current-rated for 10 A or higher.
Firmware-Relevant Hardware Requirements
  • LED data pin: GPIO21 / D3.
  • Strip power control: GPIO17 / D7.
  • Buttons: GPIO2 and GPIO1, active-low.
  • Status LED: spare GPIO, active-high preferred.
Physical Design Expectations
  • XIAO antenna edge at PCB edge.
  • Copper keepout under antenna on all layers.
  • 1000 uF bulk capacitor placed near strip output connector.
  • High-current input and output connectors placed to minimize current path length.
Important Design Decisions
  • Use AHCT-family buffer for reliable 3.3 V to 5 V WS281x data compatibility.
  • Use P-channel MOSFET high-side strip switching rather than low-side switching to keep LED data ground reference continuous.
  • Maintain separate 5V_SYS and 5V_STRIP nets so the MCU remains powered when strip power is switched off.
  • GPIO17/D7 switch logic is active-high: HIGH turns strip power ON via the N-FET gate driver; LOW leaves strip OFF.
  • Prefer blade/low-resistance fuse for 10 A production path unless a suitable low-drop PTC is confirmed.
Assumptions
  • 5 V supply is external and adequately current-limited or fused upstream.
  • XIAO ESP32-C6 exposes the specified D3/GPIO21 and D7/GPIO17 pins on the headers.
  • WS2815 use is for 5 V data-compatible variants or installations where strip power/data requirements are compatible with this 5 V controller.
Change Notes
  • Initial specification created from pasted user requirements.

  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Power Input and Protection

  • Strip Power Switch

  • Level Shifter and Data Output

  • XIAO Module

  • User I/O

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Change Notes