Hardware Prototype Timeline


flux

The enclosure revision failed as a verification artifact, not necessarily because the overall v2c enclosure concept is wrong. The generated views were not reliable enough to prove that the selected parts, cables, and service motions physically fit, so I did not use them to authorize PCB changes.
What is resolved
The UI architecture is now clear:
  • The OLED and pushable encoder will share J9’s 3V3, GND, I2C_SDA, and I2C_SCL.
  • A smart I²C encoder avoids adding raw encoder A/B/push connections to the PCB.
  • The approved visual direction remains the screw-joined translucent enclosure with exposed controls, a guarded tube hatch, and a removable rear panel.
What remains unresolved
  1. OLED mounting
    • The candidate OLED PCB is about 29.2 × 26.7 mm.
    • The existing 36 × 24 mm opening is too large to retain it directly.
    • It therefore needs a carrier or bezel with verified screw locations, display alignment, panel thickness, and cable clearance.
    • That bezel would be visible, so it must be shown accurately before changing the detailed enclosure.
  2. Encoder mounting
    • The encoder electronics are suitable in principle, but the complete mechanical stack is not qualified.
    • We need to verify the threaded bushing, washers and nut, panel opening, 3 mm panel thickness, remaining shaft length, knob engagement, and push-button travel.
    • Without this, the knob might rub the panel, sit too far out, or lose its push function.
  3. Rear power inlet
    • A specific threaded panel-mount DC jack still needs to be fixed.
    • Its cutout, anti-rotation feature, nut clearance, solder-terminal depth, plug overmold, cable bend radius, and disconnect arrangement must fit the removable rear panel.
    • Rear-panel removal must not pull directly on solder joints or require cutting wires.
  4. Heater and thermal wiring
    • The heater block and tube holder are custom mechanical assemblies, not components already represented on the PCB.
    • The exact heater cartridge, block dimensions, thermal cutoff mounting, NTC packaging, thermocouple junction, strain relief, and thermal isolation still need qualification.
    • The proposed fine thermocouple wire is not directly compatible with the existing JST-XH contact range, which expects substantially larger conductors. A mechanically sound transition is required.
  5. Cable and service sweeps
    • We have not yet demonstrated that all plugs can be inserted and removed.
    • Cable bends must avoid the PCB, supports, hatch, optical chamber, and hot surfaces.
    • The rear panel must be removable with sufficient service slack.
    • The PCB/base assembly must remain removable without trapping the UI, power, heater, or sensor harnesses.
Why PCB routing is still on hold
The connector positions determine where the harnesses enter the enclosure and how much bend space they require. If one of those connectors needs to move after routing cleanup, the newly routed copper may need to be discarded.
Once those positions are mechanically frozen, I can make a surgical cleanup around U5, R9, R10, and D4 while preserving unrelated copper. That work will particularly address the wide HEATER_LOW_SIDE trace passing R10 with only about 0.36 mm local copper separation. It technically passes the present clearance rule, but it is poor margin in a noisy switching area.
So the current status is: the electrical UI strategy is selected, but the exact mounting and harness geometry are not yet proven. The PCB has deliberately been left unchanged until that proof is available.
what's the next step?

flux

The next step is to finish the mechanical harness package before touching PCB routing:
  1. Select exact OLED mounting hardware/bezel, encoder mounting stack, and panel-mount DC jack.
  2. Define the heater block, cartridge heater, thermal cutoff, NTC, thermocouple transition, connectors, and strain relief.
  3. Update the approved v2c enclosure with those exact geometries.
  4. Verify plug insertion, cable bends, rear-panel withdrawal, and base removal.
  5. Freeze connector positions.
  6. Then clean only the U5/R9/R10/D4 switching area and rerun DRC/airwire checks.
The immediate actionable item is exact part selection and dimensioned mechanical modeling for the UI, power inlet, and heater assembly.

Thermal-Optical Validation Plan
Scope
Engineering characterization of the single-tube thermal and optical subsystem. These targets are preliminary engineering targets, not assay or diagnostic claims. Use safe color standards and noninfectious controls; assay and clinical validation remain separate.
Instrumentation
  • Test rig USB CSV logging at >=5 samples/s thermal and configurable optical cadence.
  • Calibrated reference thermometer and traceable dry-block or stirred-bath points for NTC calibration.
  • Fine-wire K-type thermocouple connected at J6/MAX31856 and positioned in a sacrificial sealed tube or validated tube surrogate.
  • Current-limited 12 V bench supply for bring-up, then the certified 12 V/3 A adapter.
  • Oscilloscope on TP5/TP6 and DMM/current probe on input/heater path.
  • Ambient-temperature sensor, stopwatch/reference timestamps, camera for condensation observations.
  • Safe colored standards spanning expected hue/intensity range; opaque cap/blank fixture for dark tests.
Calibration
  1. Calibrate the block NTC chain at a minimum of 25, 50, 60, 65, 70, and 80 °C after soak. Record ADS1115 code, actual 3V3, reference temperature, and fit coefficients (Beta or Steinhart-Hart).
  2. Check thermocouple converter at ice point, ambient, and near 65 °C against a traceable reference. Record connector polarity and cold-junction offset.
  3. For optics, record dark offsets, white/reference tile response, channel linearity versus LED current or pulse width, and saturation thresholds.
Safety and fault-injection tests
  1. Verify F1 is the installed Littelfuse 02153.15MXEP 3.15 A time-lag part. At maximum normal load and worst-case ambient, measure fuse, holder, connector, and nearby-board temperature rise; repeat cold starts and representative PWM patterns to establish nuisance-opening margin.
  2. Create a controlled downstream overcurrent using a current-limited source and protected fixture. Confirm F1 clears before wiring, connectors, D1, or board copper exceed qualified limits. Do not short the certified adapter directly.
  3. Hold/reset/remove U1 while monitoring TP5 and TP6. Confirm R25 keeps HEATER_PWM_CMD low and no heater pulse occurs through reset, bootloader entry, or an unpowered MCU.
  4. Open J4 during every active state and while serial traffic is incomplete. Confirm hardware gate drive and heater current fall independently of firmware parsing.
  5. Disconnect/open each block-sensor lead and substitute near-rail ADC voltages. Confirm a latched block-sensor fault and heater-off response.
  6. Disconnect, reverse, short, and intermittently disturb the thermocouple. Confirm MAX31856 FAULT handling, DRDY stale-data timeout, implausible value/rate rejection, and heater-off response. Before testing, continuity-check the corrected topology: U3 BIAS and J6 TC- are on connector-side TC_MINUS; R27 is the only series path from that node to U3 T- on TC_MINUS_FILT; C9/C10/C11 remain on the IC-side filtered nodes. Verify the filter does not create unacceptable settling delay or offset.
  7. Stop MAX31856 conversions or hold DRDY inactive in a test fixture. Confirm the firmware latches thermocouple_stale within the declared 1 s limit.
  8. Feed a partial serial command without a newline for at least 10 s. Confirm the 100 ms control cadence, logging, interlock response, and overtemperature checks continue uninterrupted.
  9. Challenge equilibrium logic with one out-of-band sample, a >1.5 s sample gap, and a curved/drifting 60 s trace whose endpoint slope appears small. Confirm none can start RUN; only all samples in band with an acceptable least-squares slope can pass.
  10. At cold startup with an intact and then an open thermocouple, confirm ARM remains unavailable until the 2.0 s automatic open-circuit qualification interval completes and the MAX31856 status register has been read. Confirm the CSV retains the detailed current and latched fault bytes.
  11. Exercise the configurable active-cycle timeout using a shortened test build, then repeat a boundary test at the documented 90-minute engineering default or with a validated timebase simulation. Confirm expiry latches active_cycle_timeout, heater duty goes to zero, and only the normal fault-clear procedure can return to SAFE.
Sample matrix
  • At least 3 heater/block assemblies if available.
  • At least 3 thermistors or repeated remounts of one thermistor.
  • Tube brands/lots: minimum 3 representative lots.
  • Fill volumes: 10, 15, 20, 25, and 30 uL, adjusted to intended workflow if different.
  • Repeated hot insertions: >=10 per representative tube/volume condition.
  • Ambient: low/nominal/high bench conditions, nominally 18, 23, and 28 °C.
  • Optical repeats: >=10 reinsertions per standard, >=10 tubes per lot, with/without controlled bubbles and condensation.
Thermal procedure
  1. Inspect guard, cutoff loop, harness, and sensor attachment. Keep tube out.
  2. Preheat the empty block toward 65 °C. Log block temperature, liquid-reference channel, duty, interlock, and faults.
  3. Characterize time to first enter 65.0 ±0.5 °C, peak overshoot, settling time, steady-state mean/range/standard deviation, duty cycle, input current, and ambient.
  4. Open the guard: confirm TP6 and heater current fall to off without firmware cooperation.
  5. Reclose the guard, command guarded hot insertion, insert a sealed tube, and timestamp insertion.
  6. Track block recovery and liquid temperature. Define equilibration as 61 consecutive nominally one-second liquid samples, every sample within ±0.5 °C, no gap >1.5 s, a window spanning at least 60 s, and least-squares slope magnitude below 0.1 °C/min, unless data justify a revised criterion. Start the assay-duration timer only after this event.
  7. Continue for the intended hold duration. Observe condensation, top/bottom gradient, bubbles, and tube deformation.
  8. Repeat across matrix. Run a controlled separate one-shot cutoff qualification on a dedicated assembly; do not reuse a tripped cutoff.
Optical procedure
  1. With all four LED_*_CMD low, acquire >=100 dark samples with optical chamber closed; repeat under bright room light to measure ambient rejection.
  2. Sequence white, red, green, and blue channels individually. Use fixed off-settle, on-warm-up, and acquisition windows; never overlap channels initially.
  3. Measure LED short-term warm-up, 30-60 min drift, supply sensitivity, and temperature dependence at room temperature and during a 65 °C thermal cycle.
  4. Measure tube removal/reinsertion repeatability, tube-to-tube variation, rotational sensitivity, fill-volume sensitivity, bubbles, condensation, and intentional ambient leaks.
  5. Preserve raw R/G/B/clear counts, integration time, gain, LED channel, command duration, dark counts, temperature, tube ID, orientation, and standard ID.
  6. Compute normalized values only in addition to raw values: r=R/(R+G+B), g=G/(R+G+B), b=B/(R+G+B), and channel/clear ratios where clear is safely above dark.
Recorded CSV fields
Device CSV fields are timestamp_ms,state,fault,block_c,liquid_c,ads_code,heater_duty,interlock,tc_fault_now,tc_fault_latched,opt_led,opt_r,opt_g,opt_b,opt_clear,dark_r,dark_g,dark_b,dark_clear,liquid_slope_c_per_min,liquid_equilibrated,opt_command_ms,run_elapsed_ms,cycle_elapsed_ms. Host/operator metadata remains ambient_c,tube_id,tube_lot,fill_ul,orientation,standard_id,notes and must be joined by timestamp/run record rather than fabricated by firmware.
Preliminary engineering acceptance targets
Thermal
  • Block overshoot =5 pooled standard deviations in the selected normalized feature space, with no saturation.
  • Ambient-light shift with chamber closed: provisional <1% of illuminated signal after dark subtraction. All optical thresholds remain provisional until real tube/dye measurements exist.
Analysis and design feedback
  • Fit heater plant time constants, dead time, gain, required PWM frequency, and PID limits from step/insertion responses.
  • Convert block-to-liquid offset versus fill, ambient, and elapsed time into firmware equilibrium logic and integrated-reader sensor placement requirements.
  • Use maximum measured current and cable transients to revise fuse, connector, MOSFET, TVS, and wiring ratings.
  • Use optical SNR, saturation, normalized separation, drift, and geometry sensitivity to select final sensor, emitter wavelengths/currents, chamber geometry, and calibration method.
  • Reject any optical conclusion that depends on a single tube, standard, or unqualified breakout.
  • Scope

  • Instrumentation

  • Calibration

  • Safety and fault-injection tests

  • Sample matrix

  • Thermal procedure

  • Optical procedure

  • Recorded CSV fields

  • Preliminary engineering acceptance targets

  • Thermal

  • Optical

  • Analysis and design feedback