Brushed DC Motor Controller

Thought for 8 mins 17 sec
Created 3 tasks.
1/3 Inspect board outline, current placement, and PCB constraints
Thought for 3 sec
Referenced guidance.
Thought for 8 sec — Evaluating load inspection
Getting a layout overview.
Thought for 9 sec — Evaluating board size
Reading schematic details.
Thought for 8 sec — Planning board specifications
2/3 Place connectors, power stage, MCU, sensing, and support components

Inspect board outline, current placement, and PCB constraints

Place connectors, power stage, MCU, sensing, and support components

Run placement/DRC review and correct overlaps or clearance issues

Thought for 14 sec
Thought for 7 sec
Awaiting 1 background task
Received notification from "PCB Placement Layout" that it finished — picking the work back up.

flux

The PCB placement executor completed, after I inspected the existing 160 × 100 mm default board and specified an 80 × 50 mm, 4-layer placement organized around the high-current path, current sensing, buck regulator, MCU, encoder conditioning, and edge-accessible connectors.
Open items:
  • I could not read and independently reconcile the executor’s final report or run the required placement DRC because no ACUs are currently available.
  • Placement still needs confirmation for zero overlaps, out-of-bounds parts, keepout violations, and correct connector accessibility.
  • Routing has not started.
Check placement and DRC
Document placement constraints
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Files

Schematic

Layout

Preview

J5
U2
End of Life
U5
C26
Capacitance
100nF
F1
C18
Capacitance
1uF
J3
U1
C5
Capacitance
10uF
C6
Capacitance
220nF
C10
Capacitance
22uF
C12
Capacitance
22uF
C13
Capacitance
100nF
C27
Capacitance
4.7nF
C30
Capacitance
1nF
C1
Capacitance
220nF
C23
Capacitance
100nF
C9
Capacitance
22uF
C2
Capacitance
47uF
C11
Capacitance
22uF
C14
Capacitance
100nF
C24
Capacitance
33nF
C20
Capacitance
1uF
C17
Capacitance
10nF
C22
Capacitance
100uF
C29
Capacitance
1nF
C4
Capacitance
47uF
C21
Capacitance
100nF
C16
Capacitance
4.7uF
C28
Capacitance
1nF
C19
Capacitance
100nF
C31
Capacitance
100nF
C3
Capacitance
100nF
C8
Capacitance
1uF
C7
Capacitance
100nF
C32
Capacitance
10uF
C15
Capacitance
100nF
C25
Capacitance
1uF
U6
R21
Resistance
1kΩ
R10
Resistance
100kΩ
LED2
J2
R8
Resistance
100kΩ
Q1
R1
Resistance
100kΩ
SW1
R16
Resistance
4.7kΩ
R3
Resistance
100kΩ
R9
Resistance
100kΩ
R5
Resistance
10kΩ
R6
Resistance
270Ω
R12
Resistance
100kΩ
R17
Resistance
4.7kΩ
D3
U3
D1
J1
R22
Resistance
1kΩ
D2
R15
Resistance
4.7kΩ
R2
Resistance
43.2kΩ
LED1
J4
R18
Resistance
100Ω
R4
Resistance
10kΩ
LED3
R19
Resistance
100Ω
R14
Resistance
100Ω
R13
Resistance
10mΩ
R7
Resistance
10kΩ
R20
Resistance
100Ω
R23
Resistance
1kΩ
R11
Resistance
100kΩ
U4
L1
Inductance
6.8uH
Design Notes
Datasheet-Backed Component Choices
H-Bridge: NXP MC33926PNB
  • Motor supply: VPWR class 5 V to 28 V; selected for 12 V nominal robotics motor supply.
  • Supports bidirectional brushed DC motor control with IN1/IN2, D1/D2 disable, EN, INV, and SLEW inputs.
  • Datasheet notes PWM up to 20 kHz; slow slew mode limits PWM below 11 kHz.
  • Integrated protection: current limiting, short-circuit latch-off, overtemperature latch-off, undervoltage behavior, status flag.
  • Required external support used in schematic plan:
    • VPWR low-ESR bulk capacitance, 100 uF class, plus local 100 nF bypass.
    • Charge-pump reservoir capacitor from CCP to VPWR, allowed 30 nF to 100 nF; 33 nF selected.
    • SF active-low open-drain fault pull-up to 3.3 V.
    • FB current mirror output support: 270 ohm to GND plus optional 1 uF filter if disable-PWM strategy is used.
MCU: STM32G431CBT6
  • 3.3 V operation within datasheet VDD range 1.71 V to 3.6 V.
  • Control-oriented Cortex-M4F with encoder-capable timers, PWM timers, ADC, USART/UART, FDCAN-capable pins, and SWD/JTAG.
  • Power decoupling per datasheet:
    • Each VDD/VSS pair gets 100 nF.
    • VDD rail gets 4.7 uF bulk.
    • VDDA/VSSA gets 10 nF + 1 uF filtering/decoupling.
    • VREF+ gets 100 nF + 1 uF when used for ADC reference.
  • BOOT0 on PB8 should be controlled; use pull-down for normal boot.
  • NRST has embedded weak pull-up; add reset button and small reset capacitor for robust manual reset.
Current Sense: INA240A1D + 10 mOhm Shunt
  • INA240 selected because datasheet explicitly targets PWM motor current sensing and supports -4 V to 80 V common-mode independent of supply.
  • Gain: 20 V/V.
  • Shunt: 10 mOhm inline with motor lead.
  • Output bias: REF1 to 3.3 V and REF2 to GND gives 1.65 V zero-current midpoint.
  • Current span:
    • 2 A => 20 mV shunt => 0.4 V output swing, so output is about 1.25 V to 2.05 V.
    • 5 A transient => 50 mV shunt => 1.0 V output swing, so output remains about 0.65 V to 2.65 V.
  • INA240 supply decoupling: 100 nF close to VS/GND.
  • Layout requirement: Kelvin route shunt sense traces.
Encoder Conditioning: SN74LVC3G17DCUR
  • Triple non-inverting Schmitt buffer.
  • VCC range 1.65 V to 5.5 V; powered from 3.3 V.
  • Inputs accept up to 5.5 V at any valid VCC, useful for robotics encoders.
  • 100 nF bypass cap required at VCC.
  • All unused inputs must be tied to VCC or GND; all three channels are used for A, B, and Z.
3.3 V Buck: LMR33630BDDAR
  • Selected instead of LDO for thermal efficiency from 12 V input.
  • HSOIC/DDA package selected after ERC review to avoid the VQFN package's NC-to-SW pad conflict; datasheet pinout is PGND, VIN, EN, PG, FB, VCC, BOOT, SW, with thermal pad to GND.
  • Datasheet 400 kHz 3.3 V component set used:
    • L = 6.8 uH.
    • RFBT = 100 kΩ, RFBB = 43.2 kΩ.
    • CIN = 10 uF + 220 nF minimum; split/local ceramic capacitance recommended.
    • COUT = 4 x 22 uF rated capacitance.
    • CBOOT = 100 nF from BOOT to SW.
    • CVCC = 1 uF from VCC to GND.
    • EN tied to protected VM when always-on.
Reverse/Input Protection: LM74700-Q1 + DMT6008LFG + SMBJ33CA
  • LM74700 ideal diode controller with external N-channel MOSFET for reverse polarity and reverse-current blocking.
  • Datasheet recommends 60 V MOSFET, VGS max >= 15 V, and RDS(on) near 6.7 mΩ to 16.7 mΩ for a 3 A nominal design; DMT6008LFG 60 V, low-RDS(on) PowerDI MOSFET matches this class.
  • VCAP: minimum 0.1 uF; selected 100 nF.
  • Input capacitance: minimum 22 nF at ANODE; output capacitance minimum 100 nF, 47 uF typical holdup selected.
  • SMBJ33CA bidirectional TVS selected for 12 V input transient protection.
Open Layout Checks
  • Confirm MC33926 thermal pad copper area supports 2 A continuous in the selected enclosure/ambient.
  • Size motor supply traces/pours for at least 2 A continuous and transient current.
  • Place input TVS and ideal diode stage directly at the input connector.
  • Place shunt in motor-current path and keep INA240 Kelvin traces short, symmetric, and away from switching nodes.

  • Datasheet-Backed Component Choices

  • H-Bridge: NXP MC33926PNB

  • MCU: STM32G431CBT6

  • Current Sense: INA240A1D + 10 mOhm Shunt

  • Encoder Conditioning: SN74LVC3G17DCUR

  • 3.3 V Buck: LMR33630BDDAR

  • Reverse/Input Protection: LM74700-Q1 + DMT6008LFG + SMBJ33CA

  • Open Layout Checks