Below is a proposed system‐level block diagram and a few targeted questions so that we can lock in your requirements before generating the detailed schematic and PCB layout.
Would you like a dedicated 2×5 SWD header for on-board programming?
Power Input Connector
Screw-terminal or pin-header? (e.g. 2.54 mm 2-pin)
Any preference on Polarity marking or filtering?
IR LED Drive Current
We’ll calculate resistor ≈**(5 V – 1.35 V – 0.2 Vsat) / 0.1 A ≃ 36.5 Ω**, so typically 39 Ω (E12). Does that sound acceptable?
Receiver Modules & Connectors
Use discrete TSSP4038 with 3-pin header per channel?
Bypass cap (100 nF) per receiver—okay?
Scan Strategy & Status LEDs
Drive all ten IR LEDs in a time-multiplexed sequence or simultaneously?
Status LEDs: common-anode row or individual resistors per LED?
Once we clarify these, I’ll prepare:
The complete schematic with proper nets, parts, decoupling, level shifting or buffers
A two-layer PCB top‐view placement showing Tx on the bottom half, Rx on the top half, 4× corner mounts, collimator guides, and separation of power/logic/IR sections
Please let me know your choices on the above points!