PCB Layout Optimization
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Engineering Review Report V2
Project
Design Review Report: Files Demo Project
Review scope
Rigorous schematic- and layout-aware review of the USB-powered ESP32-S3 RS-485 ultrasonic flow-sensor controller. This review prioritized verified project connectivity, BOM data, layout state, and component datasheet guidance. Where the project or source documentation did not expose enough information, findings are marked as open questions rather than assumptions.
Executive summary
This design has a solid high-level architecture: USB-C input, protected 5 V front end, a dedicated 3.3 V buck for the controller, a dedicated 12 V boost rail for the external sensor, direct USB to the ESP32-S3, and an RS-485 transceiver with surge protection near the field connector. The core topology is plausible and mostly aligns with the main component datasheets.
The biggest risks are not the basic topology, but implementation details and deployment assumptions:
- The PCB layout is still incomplete, with many unrouted airwires.
- The USB ESD protector is placed far from the USB-C connector, reducing its effectiveness versus the datasheet recommendation.
- The ESP32-S3 WROOM module appears not to be placed in a clearly antenna-safe board-edge arrangement, and the available layout evidence does not show the required antenna keepout strategy.
- The input protection/fuse sizing may be marginal once the unknown 12 V sensor load is included.
- The RS-485 bus has no on-board selectable termination; that may be fine in some installations, but it is a system-integration risk for a point-to-point field cable unless termination is guaranteed elsewhere.
Overall, this is a promising design direction, but I would not consider it ready for fabrication yet.
Overall risk assessment
- Functional architecture: Medium risk
- Power subsystem: Medium risk
- Digital/controller subsystem: Low to Medium risk
- RS-485 interface robustness: Medium risk
- PCB/layout readiness: High risk
- Manufacturability/readiness for bring-up: High risk
What looks strong
- The 3.3 V buck stage uses the exact values called out in the TPS62162 datasheet example: 10 uF input, 22 uF output, 2.2 uH inductor, and EN tied high.
- The ESP32-S3 enable/reset network matches Espressif guidance well: 10 k pull-up plus 1 uF RC on EN and a reset switch.
- The MT3608 boost stage uses a reasonable 10 uH inductor, Schottky diode, and a resistor divider that calculates to about 12.0 V.
- The RS-485 surge protector is placed close to the field connector, which is good practice.
- The board has generous area and low placement density, which should make cleanup and rework easier.
Major issues
Issue 1 - Layout is not electrically complete
- Severity: Critical
- Affected components/nets: PCB layout overall
- What I observed:
- DRC reports 72 airwire errors in the PCB layout.
- The layout summary shows the board is placed, but many required interconnects are still unrouted.
- Why it is a problem:
- The board cannot function as intended until those airwires are resolved.
- Any other layout-level review is preliminary while the routing is incomplete.
- Verified source:
- Project review/DRC output: 72 airwire errors.
- Recommended action:
- Finish routing first.
- Re-run DRC/ERC after routing and before manufacturing export.
Issue 2 - USB ESD protector is too far from the USB-C connector
- Severity: High
- Affected components/nets: J1, U3, USB_D+, USB_D-, VBUS/GND return near USB entry
- What I observed:
- J1 center is at approximately (0, -30.46 mm).
- U3 center is at approximately (0, -10 mm).
- That is roughly 20 mm of separation between the connector and the USB ESD protector.
- Why it is a problem:
- The USBLC6-2 datasheet says the protection device should be placed as close as possible to the disturbance source, generally the connector.
- Long trace length ahead of the protector allows the surge current to propagate deeper into the board before clamping.
- Verified source:
- USBLC6-2 application/layout guidance: keep tracks from data lines/VBUS/GND to the protection device as short as possible and place the device as close as possible to the connector.
- Verified project layout positions of J1 and U3.
- Recommended action:
- Move U3 immediately adjacent to J1.
- Keep D+/D- entry traces into U3 extremely short and route from U3 to the ESP32 afterwards.
- Keep the U3 VBUS and GND return short and low inductance.
Issue 3 - ESP32 module antenna placement / keepout is not verified safe
- Severity: High
- Affected components/nets: IC1 and surrounding PCB area
- What I observed:
- The project uses ESP32-S3-WROOM-1, the PCB-antenna module variant.
- The layout places IC1 centered at about (0, 24 mm), rotated 180 degrees.
- The available layout data does not demonstrate that the antenna end is at the board edge or that the required no-copper/no-routing keepout is preserved.
- Why it is a problem:
- Espressif recommends placing the PCB antenna outside the base board, with the feed point close to the board edge.
- If that cannot be done, Espressif recommends at least 15 mm clearance around the antenna area with no copper, routing, or components.
- Poor antenna placement can severely degrade RF range, certification margin, and wireless reliability.
- Verified source:
- ESP32-S3-WROOM-1 datasheet and hardware design guidelines: board-edge placement preferred; otherwise maintain at least 15 mm antenna clearance and avoid copper/components/routing under or around the antenna area.
- Project layout position of IC1.
- Recommended action:
- Verify module orientation so the antenna end faces the board edge.
- Implement the Espressif keepout geometry explicitly in layout.
- If the board shape cannot support that, consider the UFL/connector antenna variant instead.
Issue 4 - Input fuse sizing may be marginal for the intended system load
- Severity: High
- Affected components/nets: F1, VBUS_RAW, VBUS, VCC_5V, IC3, U6/VCC_12V sensor supply
- What I observed:
- F1 is Bel 0ZCJ0050FF2G with 0.50 A hold current and 1.00 A trip current.
- The board must power the ESP32 subsystem plus a 12 V boost converter that feeds the external sensor.
- The sensor product page shows the sensor accepts 8-36 VDC / 24 VDC nominal, but the current consumption is not specified in the available documentation.
- Why it is a problem:
- If the external sensor current is moderate, the 5 V input current can approach or exceed the PTC hold current after boost conversion losses and startup current.
- That can cause nuisance trips, brownouts, or unreliable startup.
- Verified source:
- F1 datasheet values: 0.50 A hold, 1.00 A trip, 8 V maximum rated voltage for this variant.
- Project architecture: 5 V input powers both the buck and the 12 V boost rail.
- Sensor product page: supply range visible, current consumption not visible.
- Recommended action:
- Obtain the real sensor current draw over voltage and temperature.
- Budget worst-case USB input current including boost efficiency and startup transients.
- Re-evaluate F1 hold current and USB source assumptions.
- If needed, increase fuse rating, reduce sensor supply current, or change the input power architecture.
Moderate concerns
Issue 5 - RS-485 termination strategy is missing on the board
- Severity: Medium
- Affected components/nets: U4, RS485_A, RS485_B, U6
- What I observed:
- The RS-485 interface has 10 ohm series resistors and an SM712 surge protector.
- No on-board 120 ohm A/B termination resistor is present.
- No jumper/selectable termination option is present.
- Why it is a problem:
- If this board sits at the end of a cable segment, the system may require termination for signal integrity and EMI robustness.
- For a short lab cable it may still work, but field reliability becomes installation-dependent.
- Verified source:
- Verified project nets/components: U4, R4, R6, D5, U6; no 120 ohm resistor found across A/B.
- THVD1450 family documentation indicates integrated receiver fail-safe behavior, so absence of external bias is not automatically wrong; however, that does not eliminate the need to think about line termination at system level.
- Recommended action:
- Decide whether this node can ever be a bus endpoint.
- If yes, add a selectable 120 ohm termination option close to the connector/transceiver.
- Document the expected cable topology if termination is intentionally off-board.
Issue 6 - RS-485 A/B failsafe bias is not present, but this is probably acceptable only because the chosen transceiver has integrated failsafe
- Severity: Medium
- Affected components/nets: U4, RS485_A, RS485_B
- What I observed:
- No external A/B bias resistors are present.
- The selected THVD1450 family indicates receiver failsafe behavior without the need for external failsafe biasing resistors.
- Why it is a problem:
- This is not inherently incorrect with this transceiver.
- The residual risk is mainly interoperability and cable-environment behavior if the installation departs from expected point-to-point conditions.
- Verified source:
- TI THVD1450 product documentation/search results explicitly state open/idle/short failsafe behavior without external failsafe bias resistors.
- Recommended action:
- Keep the transceiver choice.
- Add a note in system documentation that external bias is intentionally omitted because the transceiver has integrated failsafe.
- If long cables/noisy industrial environments are expected, validate with real cable testing.
Issue 7 - Boost converter output target is correct, but the sensor load capability is unverified
- Severity: Medium
- Affected components/nets: IC3, R12, R9, L1, D4, C9, C10, VCC_12V, U6
- What I observed:
- MT3608 FB reference is 0.6 V.
- The implemented divider is 150 k / 7.87 k, which sets VOUT to approximately 12.0 V.
- EN is tied to VCC_5V, which matches the datasheet guidance for automatic startup.
- However, the sensor load current is unknown.
- Why it is a problem:
- The voltage setpoint itself looks correct, but converter thermal headroom, peak switch current margin, and USB input current all depend on the actual sensor load.
- Without the load spec, the power-path review cannot be closed confidently.
- Verified source:
- MT3608 datasheet: VREF = 0.6 V, EN should be tied to input if unused, input range 2-24 V, 4 A switch current limit, Schottky diode required.
- Project implementation: EN tied to VCC_5V; divider values verified.
- Recommended action:
- Confirm sensor steady-state and startup current.
- Verify worst-case power dissipation in IC3, D4, and L1.
- Consider simulation or bench validation at worst-case cable and load conditions.
Issue 8 - USB front-end power path has a deliberate Schottky drop that reduces available headroom
- Severity: Medium
- Affected components/nets: D3, VBUS, VCC_5V, IC2, IC3
- What I observed:
- D3 connects from VBUS to VCC_5V as a Schottky power-path element.
- This protects against some backfeed scenarios, but introduces a forward drop between USB input and the internal 5 V rail.
- Why it is a problem:
- The drop reduces input headroom for both the 3.3 V buck and especially the 12 V boost stage.
- At higher sensor current, this worsens USB current demand and efficiency.
- Verified source:
- Verified project net connectivity of D3 between VBUS and VCC_5V.
- 1N5819HW Schottky function is consistent with a forward drop power path.
- Recommended action:
- Keep if reverse isolation is required, but include it explicitly in the power budget.
- If every tenth of a volt matters, consider an ideal-diode/load-switch approach instead.
Issue 9 - Power-up and USB-current budget for the whole system remains open
- Severity: Medium
- Affected components/nets: entire power tree
- What I observed:
- The ESP32 module datasheet lists external supply current budgeting guidance, and the design includes LEDs, USB ESD, RS-485, a buck, and a boost-powered external sensor.
- No current-budget document or explicit project properties were found for total input current.
- Why it is a problem:
- The design may work under nominal conditions and still fail under weak USB sources, cold startup, or sensor inrush.
- Verified source:
- Project contents and datasheets reviewed; no explicit current budget found.
- Recommended action:
- Add a current budget covering USB input, 3.3 V rail, 12 V rail, startup, and fault cases.
Minor observations
Issue 10 - Many ESP32 GPIOs are intentionally unused and flagged as floating
- Severity: Low
- Affected components/nets: IC1 unused GPIOs, J1 SBU pins, no-connect symbols
- What I observed:
- ERC flags many floating pins on IC1 and floating SBU1/SBU2 on the USB-C connector.
- For this design, most are likely intentional.
- Why it is a problem:
- Mostly noise in the review flow, but it can hide real mistakes if left unresolved.
- Verified source:
- Project ERC warnings.
- USB-C 2.0 connector usage does not require SBU pins.
- Recommended action:
- Mark intentionally unused MCU pins according to your schematic style preference.
- Leave SBU pins unconnected if no alternate mode is used.
Issue 11 - RXD pull-up on transceiver receive output should be intentional and documented
- Severity: Low
- Affected components/nets: U4:R, R11, RxD
- What I observed:
- R11 is a 10 k pull-up from VCC_3V3 to the RxD net.
- The THVD1450 receiver already has fail-safe behavior.
- Why it is a problem:
- This probably does not break anything, but it is an extra assumption on a driven digital output.
- It should be present only if you want a defined logic level during power-domain sequencing or transceiver reset.
- Verified source:
- Verified project net connectivity of R11 on RxD.
- Recommended action:
- Either keep it and document the reason, or remove it if it serves no purpose.
Issue 12 - LED current may be higher than necessary for bring-up indicators
- Severity: Low
- Affected components/nets: D6/R8, D7/R13
- What I observed:
- The green LED resistors are 75 ohm from GPIO-driven nets to ground.
- With a 3.3 V source and roughly 2.0 V LED forward voltage, current is on the order of the low tens of mA when driven hard.
- Why it is a problem:
- This may be acceptable electrically, but it is brighter and more wasteful than needed for simple indicators.
- Verified source:
- Verified resistor values and LED forward-voltage metadata from project/BOM.
- MCU GPIO current limits were reviewed only at a high level; no direct violation is proven here.
- Recommended action:
- Consider increasing resistor values if these are just status LEDs.
Per-subsystem findings
USB-C input and protection
- Good:
- USB-C sink configuration with 5.1 k pulldowns on CC1 and CC2 is correct for a USB 2.0 sink-only device.
- VBUS has both a PTC and a TVS.
- Concerns:
- The ESD protector on the USB data lines is too far from the connector.
- Available power after the Schottky drop and fuse needs current-budget validation.
3.3 V buck subsystem
- Good:
- Project matches the TPS62162 3.3 V reference values very closely:
- L2 = 2.2 uH
- C2 = 10 uF input
- C3 = 22 uF output
- EN tied high to VCC_5V
- FB tied to GND for the fixed-output part
- This section is one of the strongest parts of the design.
- Project matches the TPS62162 3.3 V reference values very closely:
- Concerns:
- None major found at schematic level.
ESP32-S3 subsystem
- Good:
- EN network matches Espressif guidance: 10 k + 1 uF + reset switch.
- GPIO0 boot strap with 10 k pull-up and boot button is conventional and appropriate.
- Direct USB data wiring to IO19/IO20 is consistent with ESP32-S3 capabilities.
- Concerns:
- Antenna layout/keepout has not been validated.
- Numerous unused GPIO warnings should be triaged so real mistakes are easier to spot.
12 V boost subsystem
- Good:
- MT3608 EN tied to VIN follows the datasheet guidance.
- Divider values correctly set about 12 V.
- Schottky diode and inductor choices are in the right class.
- Concerns:
- Load capability and thermal margin remain unknown until the sensor current is known.
RS-485 subsystem
- Good:
- Proper transceiver choice for 3.3 V logic.
- Direction control is explicit and simple.
- Surge protector is positioned near the field connector.
- Concerns:
- No on-board termination option.
- No explicit documentation of expected cable topology.
PCB/layout state
- Good:
- Board area is generous and not density-limited.
- Four-layer stackup is appropriate.
- Concerns:
- Routing is incomplete.
- USB ESD placement is poor.
- ESP32 antenna placement/keepout needs validation.
Open questions / items needing confirmation
- What is the external sensor current draw at 12 V, including startup/inrush?
- Is this board always one end of a point-to-point RS-485 cable, or can it appear in other bus topologies?
- Where is the ESP32 PCB antenna relative to the board edge, and is the required copper/component keepout implemented?
- Is the Schottky drop on the 5 V rail intentional as a reverse-isolation strategy, and has it been included in the worst-case power budget?
- Is R11 on RxD intentional for startup-state behavior, or legacy baggage?
Recommended next steps
- Finish PCB routing and clear all airwires.
- Move the USB ESD protector directly adjacent to the USB-C connector.
- Validate the ESP32 antenna placement against Espressif’s module-placement and keepout guidance.
- Obtain the real sensor current spec and close the power budget.
- Decide and document the RS-485 termination strategy.
- Re-run ERC/DRC and perform a second-pass review once the above items are closed.
Datasheet-backed facts used in this review
- TPS62162 recommended example values for 3.3 V: 10 uF input, 22 uF output, 2.2 uH inductor; EN has internal pulldown and starts when driven high.
- MT3608: EN should be tied to input if unused; VREF = 0.6 V; Schottky diode recommended; 4.7-22 uH inductor range.
- ESP32-S3-WROOM-1: EN should not float; recommended EN RC delay typically 10 k and 1 uF; board-edge/keepout guidance applies to the PCB-antenna module.
- USBLC6-2: place close to the connector and keep protected-path traces short; suitable for USB 2.0 high speed.
- Bel 0ZCJ0050FF2G: 0.50 A hold current, 1.00 A trip current.
- SMBJ5.0A: 5.0 V standoff, 6.4-7.0 V breakdown, 9.2 V max clamp at specified surge current.
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