Auto Wiring J4 Connections


I’m not certain, but this section of the Flux documentation on selector-based layout rules should help—you can use it to add any rule (copper weight, trace width, clearance, via size, etc.):
To create a ruleset:
  1. Navigate to the PCB editor of your project
  2. Select the “Rules” tab in the panel on the left of the screen
  3. Choose the “New Ruleset” button and a new item will appear underneath the project rules titled “New Ruleset”
Once you select that new ruleset, you will notice that a new panel appears on the right side of the canvas. Under Layout Rules, click Add and then select the rule you wish to define (e.g., Copper Weight, Minimum Trace Width, Clearance, Via Drill Size).
You can browse the rest of the Flux documentation here:
Copper Weight → set 1 oz or 2 oz.
Min Trace Width → type 8 mil.
Clearance → type 6 mil (global), but you can override for specific net classes.
Expand Via Rules:
Drill size = 0.3 mm
Annular ring = 0.6 mm
This is the most relevant entry I found related to setting minimum trace widths:
In the “Layout Rules” tab, select the “Edit” button and then select “Add.”
Search for Trace Width in the rule selector and select “Add.”
• You can also add Trace Width Maximum and Trace Width Minimum to further constrain the width.
In the property’s field, enter the desired trace width.
For setting Copper Weight, Clearance, and Via Rules, I didn’t find corresponding entries. You can explore the full Flux documentation or ask in the community:
Set trace width
Set copper weight
Set global clearance
Override net class clearance
Define via rules

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TP2
C4
TP5
TP1
TP6
TP8
TP3
TP4
TP7
J1
J2 Pin_1 - U1 HIN
J2 Pin_1 - U1 HIN
U1 VB - D1 2
D4
J1 P2 - U1 COM
U1 VS - C4 P2
J1 P2 - U1 COM
U1 VS - C4 P2
U1 VS - C4 P2
J2 Pin_4 - U1 SD
J1 P2 - U1 COM
J1 P2 - U1 COM
U1 VS - C4 P2
J1 P2 - U1 COM
J2 Pin_2 - U1 LIN
J2 Pin_2 - U1 LIN
J1 P2 - U1 COM
J1 P2 - U1 COM
J1 P2 - U1 COM
U1 LO - R2 1
J1 P2 - U1 COM
J1 P2 - U1 COM
J1 P2 - U1 COM
U1 LO - R2 1
U1 VS - C4 P2
J2 Pin_4 - U1 SD
U1 LO - R2 1
U1 VB - D1 2
J1 P2 - U1 COM
U1 VS - C4 P2
U1 HO - R1 1
J1 P2 - U1 COM
J2 Pin_2 - U1 LIN
U1 HO - R1 1
U1 VB - D1 2
J2 Pin_4 - U1 SD
J1 P2 - U1 COM
J1 P2 - U1 COM
J2 Pin_1 - U1 HIN
U1 VS - C4 P2
U1 VS - C4 P2
U1 LO - R2 1
U1 LO - R2 1
J1 P2 - U1 COM
U1 VS - C4 P2
J1 P2 - U1 COM
U1 VB - D1 2
J1 P2 - U1 COM
J2
R7
Resistance
500 Ω
R2
Resistance
10 Ω
Q1
Not Recommended for New Designs
Q2
Not Recommended for New Designs
R1
Resistance
10 Ω
R5
Resistance
68 Ω
R6
Resistance
500 Ω
R8
Resistance
500 Ω
D2
M4
C6
J4
F1
C1
Capacitance
100nF
C7
Capacitance
Capacitance
J3
U1
Not Recommended for New Designs
C3
Capacitance
Capacitance
M1
R3
Resistance
10kΩ
D3
M3
M2
R4
Resistance
10kΩ
U4
D1
C5
Capacitance
1uF
U2
C2
Capacitance
10µF
U3
Name

PowerLane™ Driver Board

PowerLane™ Driver Board thumbnail