Project Idea Start
Image
Image
Thought for 37 sec
That identifies it: it’s a WEMOS D1 R32 V1.0.0, an Arduino Uno-form-factor ESP32 board. I’ll update the carrier design to use its shield-header pinout and mechanical pattern.
Worked for 2 mins 26 sec
The photos confirm your board is a WEMOS D1 R32 V1.0.0, using the Arduino Uno-style shield connector layout—not the current 38-pin ESP32 DevKit footprint.
The existing sensor-carrier schematic remains intact. The following update is still pending because no ACUs are currently available:
- Replace the ESP32 DevKit interface with D1 R32 shield headers
- Verify and remap the sensor GPIO connections
- Apply the Arduino Uno R3 mechanical header pattern
- Update the specification, firmware, and bring-up files
- Re-run ERC/connectivity checks
No partial replacement was made, so the current schematic has not been left broken.
Map sensor GPIOs
Find D1 R32 footprint
Show header pinout
Check pin conflicts
Update requirements
Refine this doc
Ask about this doc
Design Notes
Verified module requirements
Table
| Load | Rail | Documented current | Interface / logic |
|---|---|---|---|
| MR60BHA2 | 3.3 V (3.1–3.5 V) | 600 mA; source capacity >1 A recommended | 3.3 V UART, default 1,382,400 baud |
| MR60FDA2 | 3.3 V (3.1–3.5 V) | 600 mA; source capacity >1 A recommended | 3.3 V UART, default 115,200 baud |
| INMP441 | 3.3 V | 2.5 mA max normal | 3.3 V I2S; L/R low = left; 100 kΩ SD pulldown |
| MQ-2 module | 5 V | 800 mW ≈ 160 mA | AO may approach 5 V; DO omitted because it may be 5 V logic |
| DHT11 | 3.3 V | 2.5 mA measuring | single-wire DATA, 5 kΩ recommended pull-up |
| ESP32 DevKitC | isolated 5 V input | 500 mA conservative Wi-Fi/transient allocation | 3.3 V GPIO |
| Optional XIAO | protected 5 V | 250 mA provisional connector allocation | 3.3 V UART logic expected; verify exact future board |
Worst-case power budget
- Two radar modules: 1.20 A at 3.3 V = 3.96 W. At 90% buck efficiency from 5 V: 0.88 A input.
- ESP32 development board allocation: 0.50 A at 5 V.
- MQ-2 module: 0.16 A at 5 V.
- Optional XIAO header: 0.25 A at 5 V.
- Indicator and small auxiliaries: 0.02 A.
- Total protected-5 V worst-case allocation: 1.81 A.
- F1 is a 3 A hold PTC, providing 1.66× margin over the calculated allocation. A USB-C source explicitly advertising 5 V / 3 A is required; CC pulldowns alone do not negotiate or guarantee 3 A.
Power architecture
- USB-C VBUS → F1 3 A PTC → 5V_PROTECTED.
- SMF5.0A clamps the protected rail; 470 µF bulk plus 100 nF bypass support load steps.
- SS34 series diode feeds only the ESP32 DevKit 5V pin. Its orientation allows carrier-to-board current and blocks reverse current from the DevKit USB rail back into the carrier/laptop source.
- TPS62823 creates 3V3_RADAR. It is rated 3 A and switches at about 2.2 MHz, satisfying the radar documentation's ≥2 MHz DCDC recommendation.
- TPS62823 values: 470 nH inductor, 4.7 µF input, 2×10 µF output, 450 kΩ/100 kΩ feedback (0.6×(1+450/100)=3.30 V), 120 pF feed-forward.
- Dev-board 3V3 powers only INMP441 and DHT11 (<6 mA combined), because the DevKit regulator rating is not documented and is not used for the radar loads.
GPIO map
Table
| ESP32 pin | Net | Function |
|---|---|---|
| GPIO17 TX / GPIO16 RX | RADAR_BHA_RX / RADAR_BHA_TX | UART1 to MR60BHA2 (module RX / TX) |
| GPIO23 TX / GPIO22 RX | RADAR_FDA_RX / RADAR_FDA_TX | UART2 to MR60FDA2 (module RX / TX) |
| GPIO14 | I2S_BCLK | INMP441 SCK |
| GPIO25 | I2S_WS | INMP441 WS |
| GPIO32 | I2S_SD | INMP441 data input |
| GPIO34 (ADC1_CH6) | MQ2_ADC1_CH6 | MQ-2 AO through 10 kΩ / 20 kΩ divider |
| GPIO27 | DHT11_DATA | DHT11 single-wire data |
| GPIO13 TX / GPIO33 RX | XIAO_SWUART_TX/RX | optional software UART |
UART0 GPIO1/GPIO3 remains reserved for programming/debug. GPIO6–11 are unused. MQ-2 uses ADC1, so Wi-Fi does not disable the reading. Boot-strapping pins GPIO0/2/5/12/15 are avoided.
Connector pin labels
- J2/J3: 1=3V3_RADAR, 2=GND, 3=module TX → ESP RX, 4=ESP TX → module RX.
- J4: 1=3V3_AUX, 2=GND, 3=SCK, 4=WS, 5=SD, 6=L/R=GND (left channel).
- J5: 1=5V_PROTECTED, 2=GND, 3=AO, 4=DO intentionally not connected.
- J6: 1=3V3_AUX, 2=DATA, 3=GND.
- J7: 1=5V_PROTECTED, 2=GND, 3=ESP RX, 4=ESP TX.
Analog protection calculation
R6=10 kΩ upper and R7=20 kΩ lower: VADC=VAO×20/(10+20)=0.6667×VAO. A 5.0 V AO becomes 3.33 V. C7=100 nF gives approximately 159 Hz pole against the 10 kΩ Thevenin scale and filters heater/comparator noise. Firmware must use 11 dB attenuation and calibrate the ADC; this is not a precision gas-concentration instrument without sensor calibration.
Remaining assumptions
- Radar connector mechanics vary by module/adapter; J2/J3 are labeled logical headers, not asserted as a mating footprint for the bare 29-pad radar module.
- DevKitC-32UE is the selected 38-pin original-ESP32 carrier target. Confirm the user's exact development-board header spacing before PCB layout.
Verified module requirements
Worst-case power budget
Power architecture
GPIO map
Connector pin labels
Analog protection calculation
Remaining assumptions
