Pin Description and Functionality
Table
| Pin Number | Pin Label | Function & I/O Characteristics | Special Considerations |
|---|---|---|---|
| 1 | 3V3 | Regulated 3.3 V power output (analog supply); used to power the ESP32 and peripherals | Requires proper decoupling; voltage must remain within 2.3 V–3.6 V limits |
| 2 | GND | Ground reference (no active drive) | Connect all chassis and circuit grounds together |
| 3 | D15 | Digital I/O (GPIO15); general purpose use; can be used for alternate functions (e.g. SPI) | Often involved in boot mode selection – check for pull-up/pull-down needs |
| 4 | D2 | Digital I/O (GPIO2); configurable as input/output; supports several peripheral functions | Typically has internal pull-up to help with bootstrapping |
| 5 | D4 | Digital I/O (GPIO4); general purpose with standard CMOS drive capability | Often used for sensor or interface signals |
| 6 | RX2 | UART receive input of the secondary UART port (configured as digital I/O) | Check voltage levels for proper RS‑232/TTL compatibility if using external logic |
| 7 | TX2 | UART transmit output for the secondary UART port (digital output) | Ensure proper level shifting if interfacing with non‑3.3 V systems |
| 8 | D5 | General purpose digital I/O (GPIO5); may be used for I²C/SPI functions as required | Often multiplexed with other peripheral signals – confirm board usage |
| 9 | D18 | Digital I/O (GPIO18); commonly used as SPI clock or for other high‑speed digital functions | High‐speed signals may require controlled impedance routing in layout |
| 10 | D19 | Digital I/O (GPIO19); typically available for SPI MISO or general digital use | Verify that no boot conflicts occur if used during startup |
| 11 | D21 | Digital I/O (GPIO21); frequently used as the I²C SDA line or for general interfacing | May need external pull‑up resistors when used with I²C bus |
| 12 | RX0 | UART receive input for the primary UART port (digital) | This is the default serial RX – avoid accidental interference during programming |
| 13 | TX0 | UART transmit output for the primary UART port (digital) | Used for serial communication (programming/debug); level conversion may be needed for non‑3.3 V devices |
| 14 | D22 | Digital I/O (GPIO22); frequently used as the I²C SCL line or SPI clock in alternate configurations | When used on I²C, external pull‑up is recommended |
| 15 | D23 | Digital I/O (GPIO23); available for SPI MOSI or general digital use | Commonly part of an SPI interface; ensure proper signal integrity for high‑speed data |
| 16 | EN | Enable or “chip‐reset” input; when driven high the chip operates, low resets the device | Must be correctly driven at power‑up to avoid inadvertent resets; typically connected to push‑button or supervisor circuit |
| 17 | VP | Analog input (one of the ADC channels); often used for voltage measurements | Verify input impedance and noise requirements for precise ADC readings |
| 18 | VN | Analog input (another ADC channel) used for differential or single‑ended measurements | May require decoupling and careful routing for accurate ADC performance |
| 19 | D34 | Digital I/O (GPIO34); input‑only with ADC capability | Since GPIO34 (and similar “sensor” pins) are input‑only, they cannot drive a load |
| 20 | D35 | Digital I/O (GPIO35); input‑only with ADC functions | Use only as input; no internal pull‑ups are available – add external resistors if needed |
| 21 | D32 | Digital I/O (GPIO32); widely used as an ADC input as well as a general I/O pin | Often used for analog sensing – layout should minimize noise pickup |
| 22 | D33 | Digital I/O (GPIO33); supports ADC functions and digital interfacing | Check internal multiplexer settings when used for ADC so that other functions are not conflicting |
| 23 | D25 | Digital I/O (GPIO25); can function as digital output or (in some configurations) DAC output | May be used for analog output (DAC) – verify damping and load when used as DAC |
| 24 | D26 | Digital I/O (GPIO26); available for ADC or general digital functions | Confirm that external circuit needs do not conflict with potential analog usage |
| 25 | D27 | Digital I/O (GPIO27); standard digital pin with no special restrictions | Free to use as any general-purpose I/O subject to board-level routing constraints |
| 26 | D14 | Digital I/O (GPIO14); can be used for SPI clock or other high‑speed digital functions | Check boot configuration requirements as some GPIO14 configurations affect startup |
| 27 | D12 | Digital I/O (GPIO12); available for SD card interfacing or general I/O | Note that in certain boot modes this pin must be pulled to a known level (often low) to avoid boot issues |
| 28 | D13 | Digital I/O (GPIO13); often used as SPI MOSI or for other peripheral functions | May be used by SPI interfaces – routing must account for high-frequency performance |
| 29 | GND_1 | Additional ground connection for improved signal return paths | Tie this additional ground to the common ground for noise reduction and proper decoupling |
| 30 | VIN | Input voltage port (used to supply power to the board before regulation) | Must be provided at a level appropriate for the onboard regulator; do not exceed specified limits |