INA219 Current Measurement Audit
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F2:P2 and Q2:D, VIN_PROTECTED airwires involving Q2:S, D6:K, and R6:P2, plus stale/dangling trace remnants and an overlap at Q2:D.J1 P1 -> F2 -> VIN_FUSED -> Q2 -> VIN_PROTECTED -> D3/C7/FB2 -> VIN_FILTERED.5V / U6 IN+ -> RSHUNT -> RELAY_COIL_HIGH_SENSE / U6 IN- / K1 A1. I found no schematic alternate path that bypasses RSHUNT for relay coil high-side current.Table
| # | Check | Result | Evidence / notes |
|---|---|---|---|
| 1 | U6 IN+ is on the 5V source side of RSHUNT | PASS | Net 5V connects RSHUNT:P1 and U6:IN+, along with the 5V rail nodes. |
| 2 | U6 IN- is on the relay-coil side of RSHUNT | PASS | Net RELAY_COIL_HIGH_SENSE connects RSHUNT:P2, U6:IN-, and K1:A1. |
| 3 | RSHUNT is physically routed in series with relay coil current path, not just labels | PASS | PCB copper for 5V routes to RSHUNT:P1; separate copper net RELAY_COIL_HIGH_SENSE routes from RSHUNT:P2 to K1:A1 and U6:IN-. |
| 4 | No alternate copper path bypasses RSHUNT | PASS based on available layout data | I found no direct 5V connection to K1:A1; K1:A1 is only on RELAY_COIL_HIGH_SENSE. |
| 5 | INA219 VS powered from 3.3V | PASS | Net 3V3 connects U6:VS. |
| 6 | SDA/SCL pulled up to 3.3V, not 5V | PASS | R3 and R4 are 4.7 kΩ I2C pull-ups; their upper pins connect to 3V3, and their lower pins connect to I2C_SDA / I2C_SCL. |
| 7 | INA219 GND common with ESP32 GND | PASS | U6:GND is on the common GND net, which also includes ESP32 DevKit ground pins. |
| 8 | A0/A1 address pins tied intentionally, not floating | PASS | U6:A0 and U6:A1 are both tied to GND. |
| 9 | C5 100 nF decoupling capacitor close to INA219 VS/GND | WARNING | Electrically correct: C5:P1 -> 3V3, C5:P2 -> GND. Physically, C5 is about 5.7 mm center-to-center from U6, northeast of the INA219. This is nearby but not tight decoupling placement. |
5V rail -> RSHUNT:P1 -> RSHUNT 0.22 ohm -> RSHUNT:P2 -> RELAY_COIL_HIGH_SENSE -> K1:A1 -> relay coil -> K1:A2 -> RELAY_COIL_LOW -> Q1 collector -> Q1 emitter -> GNDU6:IN+ senses the source side of the shunt on net 5V.U6:IN- senses the load/relay side of the shunt on net RELAY_COIL_HIGH_SENSE.U6:VS is powered from 3V3.U6:GND, U6:A0, and U6:A1 are tied to GND.U6:SDA and U6:SCL connect to ESP32 I2C nets with 4.7 kΩ pull-ups to 3V3.K1:A1 is not connected directly to 5V; it is on RELAY_COIL_HIGH_SENSE, which is fed from RSHUNT:P2. In the PCB layout data, 5V and RELAY_COIL_HIGH_SENSE are distinct routed nets, with the shunt bridging them.RSHUNT = 0.22 ohm:Table
| Relay coil current | Shunt voltage V = I × R | Shunt power P = I² × R |
|---|---|---|
| 70 mA | 15.4 mV | 1.08 mW |
| 80 mA | 17.6 mV | 1.41 mW |
| 100 mA | 22.0 mV | 2.20 mW |
RSHUNT is placed near U6: RSHUNT center at approximately (-0.825 mm, -12.9565 mm), U6 center at approximately (0.8722 mm, -17.6444 mm).5V and RELAY_COIL_HIGH_SENSE are routed as separate nets bridged only by RSHUNT.RELAY_COIL_HIGH_SENSE current trace. The existing routed trace is shown as 0.15 mm in the extracted layout. It is electrically acceptable for ~70–100 mA, but a wider trace would be more robust and lower impedance for a relay coil supply path.U6:IN-.RSHUNT is in series with the relay coil high side, INA219 supply and I2C pull-ups are on 3.3 V, address pins are intentionally tied low, and no shunt bypass was found. The main issue is layout quality: improve C5 placement and consider a wider relay high-side current trace before production release.Verdict
Requirement-by-requirement checks
Complete relay coil current path
Can relay current bypass RSHUNT?
Expected shunt voltage
PCB layout observations
Acceptable
Warnings / corrections before production
Final conclusion