IoT Fire Alarm Device Design
Thought for 8 sec
You should ask Quectel / supplier for the EC25MXGA hardware design package, not just the marketing datasheet.
Ask for:
-
EC25MXGA Hardware Design Guide
- Full pin descriptions
- Power supply requirements
- PWRKEY / RESET timing
- UART / USB / SIM / RF reference circuits
- VDD_SDIO usage guidance
-
Recommended PCB land pattern / footprint
- Pad dimensions
- Pad numbering
- Paste mask / solder mask recommendations
- Keepout zones under/around the module
- Assembly notes
-
Reference schematic
- VBAT_RF / VBAT_BB decoupling
- SIM socket wiring
- Antenna matching / ESD
- Status pins
- Power-on/off sequence
-
RF layout guidelines
- 50 Ω antenna routing
- Ground stitching via recommendations
- Antenna connector/matching network placement
- Diversity/GNSS pins if used or unused
-
Certification documents
- RCM / ACMA / AS/CA S042 relevance
- Carrier approval info for Australia
- LTE band support for AU carriers
- Test reports if available
-
Lifecycle / supply confirmation
- Active production status
- Recommended replacement if EC25MXGA is not preferred
- Minimum order / lead time
Short message you can send:
We are designing a dual-modem Australian fire alarm signalling device using 2 × EC25MXGA. Please provide the EC25MXGA hardware design guide, recommended PCB land pattern/footprint, reference schematic, RF layout guide, SIM interface recommendations, VDD_SDIO connection guidance, Australian carrier/certification documentation, and lifecycle/supply status.
Ok I’ll contact them
Thought for 14 sec
Good plan. Ask them specifically for the hardware design guide + recommended PCB land pattern for EC25MXGA-128-SNNS.
Until we get that, the safest path is:
- Keep EC25MXGA in the design.
- Do not send the PCB to manufacture yet.
- Continue with placement/routing cleanup only as a draft.
- Finalize modem footprint, SIM wiring, RF layout, and
VDD_SDIOtreatment once Quectel confirms the official guidance.
Clean draft layout
Review EC25 wiring
Check power budget
Update factory checklist
Run current checks
Refine this doc
Ask about this doc
STM32H757 Interface Allocation Plan
MCU baseline
Recommended MCU family: STM32H757ZI-class device.
This allocation is an interface-level plan, not a final pin-number assignment. Final pins must be checked against the selected exact STM32H757 package, alternate functions, ADC channel availability, boot pins, USB pins, and layout constraints.
Interface allocation summary
Table
| Function | Quantity | STM32 resource type | Notes |
|---|---|---|---|
| Supervised FAS inputs | 8 | ADC inputs | One ADC channel per input, with RC filtering and protection. |
| Dedicated power-fail input | 1 | GPIO/ADC or digital input | Prefer supervised contact input; can use ADC if resistor-coded. |
| Relay outputs | 3 | GPIO outputs | Drive MOSFET/transistor relay drivers, not coils directly. |
| Quectel Modem A control | 1 | UART + GPIO | AT command UART plus PWRKEY, RESET, STATUS, RI/DTR as needed. |
| Quectel Modem B control | 1 | UART + GPIO | Same as Modem A. |
| USB-C service/programming | 1 | USB FS or HS device | Add CC resistors, ESD, and SWD backup. |
| SPI LCD | 1 | SPI + GPIO | SPI SCK/MOSI/CS/DC/RESET/backlight PWM. MISO optional. |
| Buttons | 4 | GPIO inputs | Up, Down, Left, Right with pull-ups/pull-downs and debounce. |
| Dallas/iButton key | 1 | 1-Wire GPIO | Add ESD and pull-up; logged isolate/test authorization. |
| Event/config memory | 1 | SPI or I2C | Prefer SPI FRAM or industrial SPI flash. |
| RTC / timekeeping | 1 | I2C or external crystal/RTC | External RTC preferred for timestamp stability and backup. |
| Rail monitoring | 5+ | ADC/GPIO | VIN, 3V3, modem rails, relay supply, power-good/fault pins. |
| Debug recovery | 1 | SWD | SWDIO, SWCLK, NRST, 3V3, GND test pads/header. |
| Expansion option | 1 | I2C or spare UART | Reserve for future input expansion/service module. |
Proposed peripheral mapping
ADC channels
Allocate ADC-capable pins for:
- FAS_IN1_ADC
- FAS_IN2_ADC
- FAS_IN3_ADC
- FAS_IN4_ADC
- FAS_IN5_ADC
- FAS_IN6_ADC
- FAS_IN7_ADC
- FAS_IN8_ADC
- VIN_SENSE_ADC
- MODEM_A_VSENSE_ADC
- MODEM_B_VSENSE_ADC
- 3V3_SENSE_ADC optional
- RELAY_SUPPLY_SENSE_ADC optional
- POWER_FAIL_SENSE_ADC optional if analog/supervised
UARTs
- UART_MODEM_A_TX/RX, optional RTS/CTS if EC21 reference design requires hardware flow control.
- UART_MODEM_B_TX/RX, optional RTS/CTS.
- Optional service UART test pads if not using USB CDC.
Recommendation: use hardware flow control for each modem if spare pins allow, because cellular AT/data sessions can burst and firmware reliability matters.
Modem control GPIO
For each modem:
- MODEM_x_PWRKEY
- MODEM_x_RESET_N or RESET control
- MODEM_x_STATUS
- MODEM_x_RING / RI optional
- MODEM_x_DTR optional
- MODEM_x_ENABLE / rail enable
- MODEM_x_PWR_GOOD / fault input
SIM interfaces
SIM routing is mainly modem-to-SIM, not STM32-to-SIM. STM32 may monitor SIM detect if available.
For each SIM:
- SIM_x_DETECT optional GPIO to STM32.
- SIM_x ESD protection and short routing near modem/SIM slot.
LCD interface
SPI LCD default:
- LCD_SPI_SCK
- LCD_SPI_MOSI
- LCD_SPI_MISO optional
- LCD_CS
- LCD_DC
- LCD_RESET
- LCD_BACKLIGHT_PWM
Buttons
- BTN_UP
- BTN_DOWN
- BTN_LEFT
- BTN_RIGHT
Use hardware RC or firmware debounce. Pull-ups preferred with buttons shorting to GND.
Dallas/iButton key
- IBUTTON_1WIRE
Add strong ESD protection because the key contact is user-accessible.
Relay outputs
- RELAY1_DRV
- RELAY2_DRV
- RELAY3_DRV
Use default inactive state during reset. Add pulldowns at relay driver gates/bases.
USB-C programming/service
- USB_DM
- USB_DP
- USB_VBUS_SENSE
- USB_CC1_RD
- USB_CC2_RD
USB-C is service/programming only, not main power. Include ESD at connector and consider common-mode choke if EMC testing requires it.
SWD
- SWDIO
- SWCLK
- NRST
- 3V3
- GND
Keep SWD available even if USB programming is supported.
Approximate GPIO/resource budget
- 8 ADC FAS inputs.
- 4-6 ADC rail/power monitors.
- 2 UARTs for modems; 4 pins minimum, 8 pins if RTS/CTS used.
- 10-14 modem control/status GPIOs.
- 6-7 LCD pins.
- 4 button GPIOs.
- 1 Dallas key GPIO.
- 3 relay GPIOs.
- 4-6 SPI memory/RTC pins depending selected parts.
- 3-5 USB/SWD pins.
STM32H757ZI-class package has enough I/O margin for this architecture.
Firmware-visible state requirements
Firmware should expose/log:
- FAS input state per channel: normal, alarm, fault, isolate, combinations, open, short.
- Dedicated PWR / FDCIE power-fail input.
- ASE supply voltage, low battery/supply lost, incorrect voltage events.
- Modem A path state and signal level.
- Modem B path state and signal level.
- SIM A/B status.
- Antenna/RF path diagnostic if modem exposes useful status.
- Relay programmed function and energized state.
- Dallas/iButton key use, test/isolate mode entry/exit, timer expiry.
- USB service session events where relevant.
Final pin assignment workflow
- Select exact orderable STM32H757 package.
- Lock required alternate functions: USB, UARTs, SPI LCD, SPI memory, I2C RTC.
- Assign ADC pins for all 8 inputs and rail monitors.
- Assign remaining GPIOs for modem control, relays, buttons, iButton, power-good signals.
- Check boot pins and strapping so relays/modems do not accidentally activate during reset.
- Check layout grouping: ADC inputs near field input front-end, RF/control near modems, USB near connector, SWD accessible.
- Create schematic net names exactly matching this allocation plan.
MCU baseline
Interface allocation summary
Proposed peripheral mapping
ADC channels
UARTs
Modem control GPIO
SIM interfaces
LCD interface
Buttons
Dallas/iButton key
Relay outputs
USB-C programming/service
SWD
Approximate GPIO/resource budget
Firmware-visible state requirements
Final pin assignment workflow
