Remaining Schematic Cleanup Tasks
Current Baseline
The schematic now contains the major required blocks for the ASE IoT device:
- Protected 12–24 VDC input and regulated rails.
- STM32H757 MCU core.
- USB-C programming/service port and SWD debug.
- 2 × EC25MXGA cellular modules.
- 2 × SIM card slots, one SIM per modem.
- 2 × external antenna/u.FL pigtail RF outputs.
- 8 × supervised sealed-resistor-pack FAS inputs.
- 1 × dedicated power-fail input.
- 3 × programmable relay outputs.
- Basic SPI LCD connector and four front-panel buttons.
- Dallas/iButton isolate key interface.
- RTC and SPI FRAM event memory.
Locked Practical Assumptions
- LCD: basic SPI LCD module is acceptable for this revision; final connector pinout must match the selected LCD before manufacture.
- Cellular: EC25MXGA-128-SNNS is the working module for both modem positions.
- SIM: dual SIM card slots are required and remain part of the layout/routing constraints.
- Inputs: sealed resistor-pack/EOL ladder is a product-specific design; first-pass values are documented separately and must be bench-validated against ADC tolerance and cable noise.
- PCB: initial board target is 100 mm × 160 mm, 4-layer stackup.
- MCU: STM32H757IIT6 LQFP-176 is now the selected processor package for manufacturability.
STM32 Package / DSI Fix Status
The original STM32H757ZIY6TR WLCSP part was removed because its footprint/library pad overrides caused impossible pad overlap and routing blockage around pins including PA9/PC9/PE2.
The processor is now STM32H757IIT6 in LQFP-176. This package is more practical for this board because it is easier to route, inspect, assemble, and rework than the WLCSP package.
U5 VDD12DSI has been fixed for unused DSI:
- DSI is not used in this design.
- VDD12DSI is tied to the local DSI regulator/capacitor node as required for the STM32 DSI supply domain handling.
- Local 2.2 uF capacitance to GND has been added on the DSI 1.2 V node.
- DSI signal pins remain unused/no-connect.
EC25 VDD_SDIO ERC Status
The EC25MXGA library symbol currently defines VDD_SDIO as a required power-input pin. In this project SDIO is unused, and VDD_SDIO should not be tied to 3.3 V just to silence ERC unless the Quectel hardware design guide explicitly requires that connection for the selected interface mode.
Actions attempted:
- Marked U6:VDD_SDIO and U7:VDD_SDIO as no-connect using short pin names.
- Re-applied no-connect using the exact symbol terminal identifiers U6:VDD_SDIO::34 and U7:VDD_SDIO::34.
- Reran focused ERC for VDD_SDIO.
Result: the missing-power ERC still reports U6/U7 VDD_SDIO because the library pin is typed as a mandatory power input; the ERC engine does not suppress this specific power-pin rule with a project-level NC annotation.
Required final fix: edit/fork the EC25MXGA component library entry so pin 34 VDD_SDIO is typed as Power Out, Passive, or NC-compatible for this project. Do not electrically drive VDD_SDIO from a board rail unless verified against the EC25 hardware design guide.
Latest Routing / Check Status
Previous routing/check status before the STM32 package replacement and DSI fix:
- 69 airwire errors remained.
- 7 overlapping-copper errors remained.
- 2 dangling-trace warnings remained.
- 2 EC25 VDD_SDIO missing-power ERC errors remained.
The WLCSP footprint blocker has been corrected by switching to the LQFP-176 MCU, but PCB placement and routing still need to be cleaned up around the larger processor package.
Cleanup Tasks Before Factory Release
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Finish MCU placement/routing cleanup — highest priority
- Re-place MCU decoupling/support parts tightly around the new STM32H757IIT6 LQFP-176.
- Remove stale routing from the previous WLCSP placement if it causes overlaps or dangling traces.
- Re-route MCU escape, USB, SPI, ADC inputs, buttons, LCD, FRAM, RTC, and modem UART/control nets.
- Re-run DRC before manufacturing export.
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Resolve EC25 VDD_SDIO ERC at library/component level
- Preferred: edit/fork the EC25MXGA component so VDD_SDIO pin 34 is typed as Power Out, Passive, or NC-compatible.
- Do not tie VDD_SDIO to 3.3 V just to silence ERC unless the EC25 hardware design guide explicitly requires it for the selected interface mode.
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Power front end
- Calculate final LTC4368 UV/OV threshold resistor values.
- Verify back-to-back MOSFET orientation against the LTC4368 reference design.
- Confirm fuse/eFuse rating and TVS surge energy rating for the intended fire-panel supply environment.
-
Regulators and modem rails
- Finalize 4.0 V modem buck feedback values and compensation/bootstrap/soft-start values.
- Confirm each modem rail can support simultaneous cellular TX current peaks.
- Add current/fault telemetry if required by compliance testing.
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EC25MXGA modem interface
- Confirm VBAT, VDD_EXT, PWRKEY, RESET_N, STATUS, RI, UART, SIM, and RF pin usage against the EC25 hardware design guide.
- Verify SIM ESD capacitance is suitable for SIM clock/data lines.
- Confirm RF ESD part and footprint are acceptable for cellular antenna routing.
-
SIM card slots
- Verify pinout of both SIM sockets against the selected physical socket datasheet.
- Place SIM sockets near accessible enclosure/service area.
- Route SIM lines short, protected, and away from noisy buck/RF switching areas.
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LCD and front panel
- Select final SPI LCD module or connector pinout.
- Verify backlight current and driver method.
- Confirm button placement matches front-panel mechanical design.
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Inputs and power-fail input
- Bench-calculate and simulate ADC thresholds using STM32 ADC reference tolerance and resistor tolerances.
- Choose final resistor-pack values and tolerance grade.
- Add input surge/ESD/EMI filtering appropriate for field wiring.
-
Relays
- Confirm relay contact rating and terminal block rating for intended programmable outputs.
- Add contact terminal labels and isolation/clearance notes.
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MCU support
- Audit STM32H757 power pins, VCAP, decoupling, boot mode, reset, clocks, and unused pins.
- Decide whether an external HSE crystal/oscillator is required for modem/USB timing robustness.
- PCB layout and routing
- Keep RF paths 50 Ω and short from modem RF pins to u.FL connectors.
- Keep SIM slots with their matching modems.
- Spread MCU, modem, SIM, RF, and regulator sections to remove current routing congestion.
- Finish all remaining airwires after placement cleanup.
- Clear overlapping copper and dangling traces.
- Run full DRC/ERC/airwire checks after final routing.
- Manufacturing package
- Generate and review Gerbers, drill files, BOM, pick-and-place, assembly notes, and test checklist only after ERC/DRC are clean.