Schematic Design Issue Analysis

Below is a suggestion for how to reassign the resistor network for R3, R1, and R5 based on the review of the ESP32‑C3 datasheet and best practices for pull‑up/current‐limiting networks:

Proposed Modifications:
  1. For the I²C (or another open-drain) Lines:
    • R5:
      • Intended Role: Use as the pull‑up resistor on the I²C SDA (and/or SCL) lines.
      • Action: Disconnect its current assignment if it’s tied into a resistor network mix-up. Reassign R5 so that one terminal connects directly to the I²C net (SDA/SCL as appropriate) and the other terminal connects to the corresponding supply—typically PP3V3 if the ESP32 is powered at 3.3 V.
      • Value Validation: The ESP32‑C3 datasheet recommends using pull‑up resistor values between 4.7 kΩ and 10 kΩ on its I²C lines. Confirm that R5’s value (as set in its properties) falls within this range.
  2. For the Resistor Divider / Current-Limiting Networks on Critical Signals:
    • R3 and R1:
      • Intended Role: These appear intended either as a divider or as current limiting elements on one or more signal lines (for example, if they are setting the bias at a feedback pin or protecting a sensitive input).
      • Action:
        • Reassign both R3 and R1 so that their terminals are connected to the proper nets as specified in the ESP32‑C3 reference design. For example, if they form a divider for setting a reference voltage on a regulator’s feedback pin or in the signal chain for a sensitive input, ensure that one resistor connects from the signal to the correct voltage rail (or ground) and the other from that node to ground (or VCC), with the junction feeding the pin.
        • Cross-check the ESP32‑C3 datasheet (and any available application note) for the recommended resistor divider ratio (or current limiting resistor size) on that specific function. In many cases a divider with values in the range of 10 kΩ to 100 kΩ is used (if that is the intended function), or a current limiter of several kΩ (e.g. ~1 kΩ to 10 kΩ) is applied on sensitive outputs.
      • Verification:
        • Verify that the resistor values and the net assignments exactly match the datasheet recommendations so that:
          • The feedback or bias node receives the proper voltage.
          • The current through any limiting resistor does not exceed the safe input level of the ESP32-C3.
        • For instance, if the datasheet calls for a divider ratio to set an internal reference of about 0.6 V given a 3.3 V supply, calculate and select resistor values that meet:
          Vdiv=Vsupply×RbotRtop+RbotV_{div} = V_{supply} \times \frac{R_{bot}}{R_{top} + R_{bot}}
          and ensure the network is wired correctly.
  3. General Check of Net Labeling and Connectivity:
    • Go through the flagged airwire errors related to these resistor groups (for example, errors indicating mismatches between [R3:2] and [R1:2]) and verify that—after the reassignment—the resistor terminals connect only to their intended nets (for example, VCC, I²C, or the node forming the divider) rather than inadvertently joining unrelated signals.

Next Steps to Apply Changes:
  • Verify Component Property Values:
    Confirm that [R5]'s resistance is in the 4.7 kΩ–10 kΩ range for I²C pull-ups (if that is the intended use). If the main IC datasheet or reference design calls for a specific value, update R5 accordingly.
  • Rewire the Resistor Network:
    Edit the schematic so that:
    • The [R3] and [R1] components are disconnected from any shared or mixed signal net and are reconnected in series as a voltage divider (or separately on their target signals) with the correct node at their junction feeding the signal input (or feedback pin).
    • Their other ends go respectively to the appropriate rails (e.g. one end to VCC and the other to ground).
  • Consult the ESP32‑C3 Datasheet:
    Use the datasheet recommendations regarding the feedback, input protection, and I²C bus requirements to finalize the resistor network values and connections.
These changes will help ensure that the resistor networks serve their functions for proper pull-up and current limiting as intended, thereby improving signal integrity and reliable operation.
Use the "Apply changes" option and adjust the schematic connections for R3, R1, and R5 as described.
Assign pull-up function
Adjust resistor placement
Validate resistor values
PP5V0
PP3V3
PP3V3_SPI
PP3V3
PP12V0
PP3V3
R3
Resistance
10kΩ
C7
Capacitance
1uF
C13
Capacitance
1uF
PG_PP5V0
C18
Capacitance
1uF
USBC2.0_D_N
SPI_MISO
SPI_SCK
USBC2.0_D_P
C10
Capacitance
1uF
C15
Capacitance
1uF
SPI_SCK
C5
Capacitance
1uF
INT_ADC_DRDY
GPIO_SW1
C12
Capacitance
1uF
I2C_SDA
GPIO_SW2
SPI_MISO
C24
Capacitance
1uF
SPI_MOSI
I2C_SCL
SPI_CS
C31
Capacitance
.1uF
VOS
SPI_CS
SPI_MOSI
H4
H1
C2
Manufacturer Part Number
OPT
C25
Capacitance
22uF
Y1
R7
Resistance
100kΩ
L1
Inductance
2.2nH
R8
Resistance
953kΩ
IC1
U2
C22
Capacitance
10uF
H2
C8
Capacitance
13pF
C21
Capacitance
10uF
H3
C6
Capacitance
1.2pF
R6
Resistance
180kΩ
C30
Capacitance
10uF
L2
Inductance
2.2nH
C4
Capacitance
13pF
MCU_TXD
J1
J2
MCU_RXD
L3
Inductance
2.2uH
MCU_BOOT


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    Wirelessly connects nets on schematic. Used to organize schematics and separate functional blocks. To wirelessly connect net portals, give them same designator. #portal
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ESPRSSO32 Smart Scale AI Auto Layout [Example] qaMk

ESPRSSO32 Smart Scale AI Auto Layout [Example] qaMk thumbnail
Learn how to use AI Auto Layout on this ESP32 Espresso Smart Scale! In one click you’ll see AI Auto Layout perform magic. Pay close attention to how we recommend creating rulesets, zones, and fanouts. By copying the setup in this example on your own project, you’ll have a fully routed board in no time!

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Controls