Built the schematic for the dual-PCA9685 servo controller: two PCA9685 drivers, PCA9306 I2C level shifter, Raspberry Pi/STM32 connectors, 16 servo outputs with 220Ω series resistors, I2C pull-ups, OE pull-up, decoupling, bulk caps, 6V/5.1V rails, common ground, and mounting holes.
Configured a 4-layer PCB stackup with GND and power-plane intent, set a compact 100 × 130 mm board, and placed components with host connectors on the left, level shifter near center, PCA9685s and servo outputs on the right, and power input at the top/right.
ERC is clean for floating pins, missing power, and single-pin nets; footprints and layer assignments are present.
Success criteria review
✅ Schematic connectivity and key parts implemented.
✅ 4-layer board configured and components placed in the requested left-to-right flow.
❌ Not ready for Gerber export: physical routing/remaining copper issues are still unresolved, so manufacturing export was intentionally not generated.
Next steps
Complete PCB routing, especially 6V_SERVO/GND power distribution and all signal airwires, then rerun DRC and export Gerbers/BOM/pick-and-place once clean.
Added Raspberry Pi 40-pin connector J1 and STM32/Nucleo connector J2.
Added 16 servo headers J3-J18 with 220 ohm series resistors R1-R16.
Added I2C pull-ups R17/R18 at 4.7k to 5.1V and OE pull-up R19 at 10k to 5.1V.
Added decoupling capacitors C1-C4 at IC supply/reference pins and bulk capacitors C5/C6 near J19.
Added high-current 4-position power terminal J19 with paralleled 6V and GND contacts.
Added mounting holes H1-H4.
Created separate rails/nets: 3V3_PI, 5V1_LOGIC, 6V_SERVO, GND, I2C_SDA_3V3, I2C_SCL_3V3, I2C_SDA_5V1, I2C_SCL_5V1, PCA9685_OE, PWM channels.
Set a 100 mm x 100 mm 4-layer PCB outline with custom 4-layer stack intent: Top signals/components, Inner1 GND, Inner2 split power, Bottom routing.
Placed all 51 components with Pi connector left, level shifter center, PWM drivers/right-side servo bank, power connector lower-right, and mounting holes at corners.
Verification
ERC checks for floating pins, missing power, and single-pin nets passed.
All components have footprints.
Placement has no component overlap or out-of-board issues.
Layout congestion after placement is acceptable.
Remaining before fabrication
Physical trace routing is not complete: active airwires remain.
Some copper overlap checks remain active and need to be resolved during final routing/copper-pour cleanup.
Gerber export should wait until routing is completed and DRC is clean.
Notes
6V_SERVO is designed as a high-current rail requiring copper pours/planes, paralleled connector contacts, and via stitching to support the 20A target.
The 5.1V logic rail and 6V servo rail are electrically separated except for common ground.