Getting Started with Flux

flux

FC ma power protection, char motor signals, UART/I2C interfaces ane voltage/current sensing umeraya chhe—have 78 components ane 68 nets chhe. Hu final electrical check karu chhu; ESC project ni access haju fail thay chhe, etle tenu kaam complete thayu evu nahi kahu.
Thought for 5 mins 49 sec
Thought for 11 sec
Awaiting 1 task
"F405 Flight Controller Schematic Review" completed.
Thought for 2 mins 18 sec
Thought for 15 sec
Thought for 34 sec
Awaiting 1 task
"F405 FC Schematic Completion" completed.

flux

FC ma aa vakhat actual progress karyo chhe: 42 components ane 41 nets umeraya, etle have 78 components ane 68 nets chhe.
  • Power protection, char motor-signal outputs, receiver/GPS/telemetry UARTs, I²C ane battery-voltage/current sensing jodya.
  • Electrical review ma floating-pin errors nathi; 12 ERC errors baki chhe, jena source-detection sambandhit karano document karya chhe.
  • Specification, firmware requirements ane bring-up plan update karya.
Haju project purn nathi: capacitor/resistor ratings ni qualification, USB VBUS detection ane power policy, custom firmware build/testing, 39 × 39mm PCB placement/routing baki chhe. FC ne regulated 5V joie—raw LiPo power input par na jodsho. ESC project ni access fail thai, etle tena power stages ke routing ma aa vakhat changes nathi karya; 55A rating verify nathi.
Execution tamara ACUs pura thai gaya etle rokayu; banne boards haju manufacturing ke flight mate ready nathi.

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Files

Schematic

Layout

3D View

Interface and Firmware Gates
Executed schematic checkpoint —2026-10-08
Actualread-onlysummary78components/68nets, upfrom36/27. Added42components,41nets,renamedUSB_CORE_5V toCORE_5V_OR. Stopbeforesize/placement/routing; ESCprojectuntouched. Logicalactive-scopeblockscompleted,not flight/manufacturingrelease.
Exact added components
  • J3–J7:fiveWurth613006111216positionheaders; rated3A. Physicalpin1orientationnotresolvedbyextractedmanufacturertext;followPCBpadnumberingwithassemblyverificationbeforecablefabrication. Independentcustommaps,NOTstockcablecompatible.
  • R7–R10:100ohmmotorseries;R11–R14:100kohmbootpulldowns.
  • R15–R24:ten1kohmUARTseries;R25:1kohmUART5telemetryseries.
  • R26/R27:4.7kohmI2C1pullups.
  • R28=100kohm,R29=10kohmVBATdivider;R30/R31=10kohmcurrentdivider;1%ratios,0.1W.
  • R32/R33=1kohmADCseries;C21/C22=100nF16Vsamplingreservoir/lowpass.
  • D3–D7:fivePRTR5V0U4D,125quadESDarrays.VCCpin5=3V3/GNDpin2;IOpins1/3/4/6perverifiedpintable;D7IO4NC. Datasheetdoesnotexplicitlyrecommend3.3VVCC;engineeringuseisbasedonverifiedrail-steeringdiagramand6–9Vbreakdown,notclaimed3.3Vreferenceapplication. ESDsurvivability/railinjectionrequiresbench/layoutqualification,notDCfaultprotection.
  • D8:SS14external5VORdiode;F1/F2:0603L050YR500mA6VPTCs. F1betweenUSBVBUSandD1anode;F2betweenJ7pin1andD8anode;bothdiodecathodesCORE_5V_OR. NoLiPosupply. AllnewpassivesuseconfiguredSMD0603footprintformats. AllnewcomponentFunctionalGroupsareassignedbyconnector/powerblock. DetailedarrangementAPIisnotavailable; arbitraryplacementwasnotinvented.
Exact added nets
MOTOR1_MCU,MOTOR2_MCU,MOTOR3_MCU,MOTOR4_MCU,MOTOR1,MOTOR2,MOTOR3,MOTOR4; UART1_TX_MCU,UART1_RX_MCU,UART2_TX_MCU,UART2_RX_MCU,UART1_TX,UART1_RX,UART2_TX,UART2_RX; UART3_TX_MCU,UART3_RX_MCU,UART4_TX_MCU,UART4_RX_MCU,UART3_TX,UART3_RX,UART4_TX,UART4_RX; UART6_TX_MCU,UART6_RX_MCU,UART6_TX,UART6_RX,I2C1_SCL,I2C1_SDA; USB_VBUS_FUSED,EXT_5V_INPUT,EXT_5V_FUSED,UART5_RX_MCU,ESC_TELEMETRY; VBAT_SENSE_INPUT,VBAT_DIVIDED,ADC_VBAT,CURRENT_SENSE_INPUT,CURRENT_DIVIDED,ADC_CURRENT. CORE_5V_OR isrenameofinheritedUSB_CORE_5V,notanadditionalnet.
Firmware and pin evidence
Fullreferenceconfigread:https://github.com/betaflight/config/blob/1e3f7782bfbc/configs/SPBE/SPEEDYBEEF405V5/config.h . Pinmapmatchesaddedmotor/UART/I2C/ADCsignals. MCUalternatefunctionevidenceconfirmsPB1TIM3CH4/PB0TIM3CH3AF2,PB10TIM2CH3/PB11TIM2CH4AF1;UART1/2/3AF7,UART4/5/6AF8;I2C1PB6/PB7AF4. PC1ADC123IN11,PC5ADC12IN15. ActualreceiverUART1/GPSUART2areintentionalcustomdefaultsnotreferenceUART6/UART4. BetaflightF4clocksourceaf0638839ac3SystemInitclearsHSEBYP;SetSysClockenablesHSEwithoutsettingbypass. Actualrelevantfunctionsread,notsearchcontextinference. Retainactive8MHzY1/PH1NC; customHSEbypasspatchrequiredbeforeHSEenable. Nofirmwarebuild/binarytestdone. Seefirmware-getting-started.
Verification evidence
Native pin mutation resolved all19 desired-interface MCU floating pins, plus all new connector/passive/protection floating pins. Read-only get_nets confirmed3V3_IMU includes U5VOUT, U2VDD/VDDIO and C12/C13/C14/C19; CORE_5V_OR includes D1/D8cathodes, U4/U5VIN/EN, C16/C18; raw VBAT net includes ONLY J7pin3/R28P1, not regulator or MCU. Final repeat confirmed12 source-inference errors,0 warnings and no floating-pin errors. Read-only component inspection confirmed divider/filter values and wiring. Summary net members confirm motor nets4pins, UART external nets3pins, I2Cnets4pins, ADCnets4pins; all headers fully connected. Passive-review filter returned no matching ERROR/WARNING reviews; this does not prove passive electrical correctness.
NativeSPICEpassiveADCsimulationcompletedDC,AC,transientand1%ratio-corner:

Table

MetricVBATCurrent
Nominalsource25.2V5V
ADCnominal2.290909V2.500000V
Maxcorner30V->2.777269V5V->2.525V
Marginbelowassumed3.2VVDDA0.422731V0.675V
Cutoff157.721Hz265.258Hz
1%settlingafter10usrampstart4.65204ms2.76811ms
WorstlistedDCresistorpowerR28~7.486mWR31~0.631mW
Bothpassivechannelsmonotonic/noovershootandwithinbound. Modelsuseidealvoltagesources,infiniteADCload,inactiveclamps;not ADCaccuracy,ESDsurge,LDOstabilityorhardwaretest. ActualADCconversionrange0–VREF+(internallyVDDA),inputsourceimpedancespec50kconditionalonsamplingtime;start480cyclesandverify.
Remaining ERC items —individually justified,NOTzeroERC
Final read-only ERC 2026-10-08:12 Errors/0 Warnings in2 categories. The earlier10-error result preceded delayed recalculation after CORE_5V_OR rename. Severity Error normally means wrong; these12 are reviewed as metadata/external-source-inference exceptions and remain visible, not tool-waived:
  1. U2:VDD missingpower:3V3_IMUactuallycontainsU5VOUTanddecoupling.
  2. U2:VDDIO missingpower:sameverifiedrail. ICMVDD/VDDIOoperating1.71–3.6Vincludes3.3V. Regulatoroutputpin5functionwaspreviouslydatasheetchecked. No terminal-pin-typeeditorisavailable;donotfakepowerflags.
  3. J1:SHELL_GND__3 undriven:physicallyconnectedGNDexternalreturn.
  4. J1:SHELL_GND undriven:sameGND.
  5. J1:GND undriven:sameGND.
  6. J1:GND__1 undriven:sameGND.
  7. J1:SHELL_GND__2 undriven:sameGND.
  8. J1:SHELL_GND__1 undriven:sameGND.
  9. J1:VBUS__1 undriven:USBhostexternallysuppliesUSB_VBUS;F1/D1consumeit,neverdrivehostconnector.
  10. J1:VBUS undriven:sameexternalUSBsource.
  11. U4:VIN missing power on CORE_5V_OR: verified net includes D1/D8 cathodes; external USB host or regulated J7 input drives it through passive fuse/diode paths. ERC cannot infer a power-output driver through that chain. Supply voltage/headroom and thermal limits are separately bounded in core-power-budget, not guaranteed by ERC.
  12. U5:VIN missing power on CORE_5V_OR: same verified diode-OR external-source path. No real supply pin is floating and no dummy driver was added. GroundandUSBhostsourcearenotexpectedonboarddrivers;addingoutputssolelytosatisfyERCwouldmisrepresentthecircuit. No genuine floating/short/driver-conflict findingreturned.
Scoped outcomes and open gates
COMPLETED:powerinput/diodeOR/PTCs,4motors,receiver/GPS/expansionUARTs,ESCtelemetry,I2C,sensing-onlyVBAT/current,logicalFunctionalGrouporganization,sourcepinreview,passiveADCsimulation,read-onlyERCinspection,actualspec/firmware/bring-up/budgetupdates. FAILED/BLOCKED:detailedsymbolarrangement/visualwirecleanup(absentmutationAPI); firmwarebinarycompatibility(custombypasspatch/buildandhardwaretestnotdelivered); fullpowerdynamic/ESD/temperaturevalidation(validatedmodels/actualPCB/hardwareabsent); exactoriginal10pinmatingmap(authoritativecontactnumberingunavailable),nowavoidedbydocumentedcustominterfaces; physicalheaderfit/heightandMCUfootprintrequirelayoutphase. UNATTEMPTED/OUTOFSCOPE:PCBplacement/routing/export,ESCchanges,flightqualification. OSD/barometer/wireless/app/camera/LED/buzzer/servo/RSSI/accessoryBECfeaturesdeliberatelyomittedfromapprovedfirstprototype,notblockedactive-scopework. OX32customESCaccessremainsunverified;no55Aorproprietaryappclaim.
Safetyconditions:external5Vregulated/currentlimitedonly;alllogic3.3V;nointerfaceDCdrivewhenFCoff;externalcurrent0–5Vonly;rawbatteryonlytosenseinputandwithincharacterizedenvelope. SS14leakage,mainsourcechangeover,USBVBUSsensingmode,IMUclock/alignment,flashdriver,currentcalibration,ADCloading,MLCCbiasandthermaltestsremainreleasegates. Assignedlogicalbuildbatchiscomplete;overallproductisnot.

  • Executed schematic checkpoint —2026-10-08

  • Exact added components

  • Exact added nets

  • Firmware and pin evidence

  • Verification evidence

  • Remaining ERC items —individually justified,NOTzeroERC

  • Scoped outcomes and open gates