Tethered Mini Drone Design

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Routing preflight found C2 and D1 inside the bottom-left mounting-hole keepout. Routing cannot preserve both the approved placement and the required Ø8 mm mechanical clearance; moving those two parts is the recommended fix.
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The autorouter connected 125 of 134 initial airwires, and surgical routing reduced the remainder to six. The remaining pins are physically blocked by the approved placement/existing copper, so further retries without changing placement or deleting working routes would not converge; I’m running the final DRC summary now.

flux

Routing is substantially complete: 753 trace segments and 154 vias were added, with no overlapping-copper, via-in-pad, dangling-trace, or redundant-trace errors.
Open items
  • 6 airwires remain:
    • EFUSE_OVP: U2 OVP → R5
    • 3V3: U4 VOS → existing 3V3 via
    • Four ground-plane connections around U6, C13, and R3
  • These remained blocked after two targeted attempts; finishing them requires local copper rip-up and likely small placement adjustments.
  • Non-blocking placement advisories remain for five decoupling loops and the U3→L1 switch-path detour.
Suggested next steps
  1. Authorize surgical movement around U2/U4/U6 and local trace rip-up to clear the six airwires.
  2. Re-run full DRC and power-integrity checks.
  3. Reconcile the routed PCB against the frame and USB-C cable clearance.

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Files

Schematic

Layout

3D View

Schematic is Auto-placed

The schematic has been arranged automatically. Flux can redraw it to be more readable, with components placed in related groups and wires drawn more legibly. This takes about 10-60 mins.

Firmware Getting Started
Target
  • MCU: STM32G431KBT6
  • Debug: SWD on PA13/PA14, NRST available on the 2×3 header
  • Logic rail: 3.3 V
Pin Map

Table

FunctionMCU pin
Arm / takeoff-land button, active lowPA1
Status LEDPA2
IMU INT1PA3
IMU chip select, active lowPA4
IMU SPI clockPA5
IMU SPI MISOPA6
IMU SPI MOSIPA7
Motor 1 PWM / TIM1_CH1PA8
Motor 2 PWM / TIM1_CH2PA9
Motor 3 PWM / TIM1_CH3PA10
Motor 4 PWM / TIM1_CH4PA11
Motor-rail enablePA12
eFuse current monitor ADCPA0
eFuse fault, active lowPB3
PD-controller interrupt, active lowPB4
Motor-buck power goodPB5
PD I2C SCLPB6
PD I2C SDAPB7
BOOT0 strapPB8
Safe Startup Sequence
  1. Configure PA8–PA11 low before enabling timer outputs.
  2. Keep PA12 low so the 4 V motor rail remains disabled.
  3. Initialize clocks, watchdog, SWD-safe GPIO, LED, button, and fault inputs.
  4. Bring up I2C and read the HUSB238A status. Request and verify a 9 V PD contract.
  5. Bring up SPI and verify the ICM-42688-P identity and live samples.
  6. Confirm eFuse fault is inactive and motor power-good is low while disabled.
  7. Only after explicit arm input and valid health checks, assert PA12 and wait for motor power-good.
  8. Start PWM at zero duty, then perform a controlled spool ramp.
Suggested Peripheral Setup
  • TIM1: four synchronized PWM channels with preload enabled and one update event for all duties.
  • SPI1: mode and maximum clock per ICM-42688-P datasheet; begin conservatively during bring-up.
  • I2C1: 100 kHz initially for HUSB238A configuration, then increase only if needed.
  • ADC: sample PA0 for input-current telemetry; calibrate against a bench ammeter.
  • Control loop: fixed-rate timer at 500 Hz minimum; record execution time and stale-sample detection.
Mandatory Fault Behavior
Immediately write zero PWM and deassert PA12 on watchdog expiry, stale IMU data, excessive tilt, PD loss, eFuse fault, motor-rail power-good loss, brownout, or control-loop overrun. Require a new deliberate arm action after every fault.

  • Target

  • Pin Map

  • Safe Startup Sequence

  • Suggested Peripheral Setup

  • Mandatory Fault Behavior