DECT NR Plus Intercom


Ho letto e consolidato la documentazione R2 e avviato lo schema Rev A. Il progetto ora contiene 53 componenti e 45 reti, inclusi nRF9151, nRF5340, power path, MAX17055 con reti Kelvin, collegamento SPI tra MCU, ES8388/I²S e catena RF 50 Ω.
Lo schema non è ancora pronto per il layout:
  • L’esecutore iniziale ha riportato 235 segnalazioni ERC.
  • Mancano ancora verifiche/completamenti per decoupling e pin riservati dei due MCU, shunt Kelvin reale, protezione batteria, consenso USB-C, watchdog/CE, NTC, matrici K1, PTT, UI, debug e test point.
  • Pinout OLED e alcuni dati meccanici restano non verificati.
  • Ho rimandato lo schema allo stesso esecutore con istruzioni precise per completare questi punti e ridurre l’ERC, ma non ho potuto recuperarne il nuovo rapporto finale.
  • Nessun placement, routing o layout PCB è stato avviato: procedere con uno schema ancora non verificato sarebbe rischioso.
Il prossimo passo è recuperare il risultato dell’ultima correzione, eseguire una review indipendente dello schema e, solo dopo ERC accettabile, configurare il PCB JLCPCB a sei strati e iniziare placement e routing.
L’esecuzione si è fermata perché gli ACUs sono terminati.
"Beltpack Schematic Rev A" completed.
Non ho potuto recuperare né riconciliare il report dell’executor “Beltpack Schematic Rev A”, quindi non posso confermare che lo schema sia corretto o pronto per il layout. In questa sessione non sono state apportate ulteriori modifiche a schema o PCB.
Restano da completare:
  • verifica indipendente di componenti, collegamenti, alimentazioni ed ERC;
  • confronto dello schema con i documenti di specifica allegati;
  • correzione degli eventuali errori;
  • definizione del budget di potenza;
  • solo dopo la validazione dello schema: stackup JLCPCB a 6 strati, profilo scheda, placement, vincoli RF/antenna e routing controllato;
  • checkpoint di approvazione tra schema verificato e layout.
L’esecuzione si è fermata perché gli ACUs disponibili sono esauriti.

Waiting for input


Project Specification - DECT NR+ Intercom Beltpack
Project Overview
Status: Draft / Phase 2 architecture and battery mechanical baseline documented; schematic capture not started.
Design an open-source portable rechargeable wireless intercom beltpack for four church operators. Revision A is a development-oriented prototype PCB, not a minimum-size product, and must prioritize testability, conservative layout spacing, RF/audio/power validation, and manufacturability.
Intended Use
  • Four identical beltpack units are worn on a belt or behind the trousers during church services.
  • Operators use common Kenwood K1-style single-ear surveillance headsets with inline external PTT.
  • Users on the same logical channel hear all currently transmitting users on that channel.
  • The system should operate without permanently required base-station hardware; if the radio protocol requires a coordinator, any identical beltpack should be able to take that role.
What the Device Should Do
  • Receive audio continuously from active peers.
  • Transmit microphone audio only while external headset PTT is asserted.
  • Support bidirectional operation and more than one simultaneous talker.
  • Mix received voice streams locally into one mono earpiece output.
  • Automatically reconnect only to previously paired beltpacks.
  • Recover when a beltpack leaves, powers off, or loses coverage.
  • Investigate multi-hop or mesh-style forwarding, while not claiming support unless validated.
  • Prioritize predictable speech latency, reliability, intelligibility, and coverage over music-grade audio quality.
Main Features
  • DECT NR+ radio baseline using Nordic nRF9151-LACA-R/R7, with nRF9161 fallback and nRF9131/Last Mile alternatives retained for later review.
  • Replaceable 1880-1900 MHz external antenna path with 50 ohm feed, pi matching footprint, RF conducted-test provision, and antenna keepout.
  • Kenwood K1 two-jack headset interface with electret mic bias, PTT detect, earpiece output, ESD, RF filtering, protection, and pinout-variation options.
  • 1.3 inch monochrome OLED.
  • Incremental rotary encoder with push switch for volume and mute.
  • Physical 4-position or 6-position rotary switch for logical channel selection.
  • Menu/info pushbutton.
  • Fully disconnecting battery power switch where practical.
  • USB-C charging and service/debug access where useful.
  • Removable KeepPower P1835J protected button-top 18650 in MPD BK-18650-PC2 through-hole holder.
  • Development headers, test points, current-measurement jumpers, and debug access.
System Architecture

Diagram


"Protected 18650 Cell" "USB-C Charger and Power Path" "USB-C Input and Service" "USB-C Current Detection" "System Rails" "Fuel Gauge" "DECT NR+ Radio" "Application and Audio MCU or Radio SoC" "Audio Codec and Earpiece Driver" "OLED and Controls" "50 Ohm RF Path and External Antenna" "Kenwood K1 Headset and PTT" "SWD UART Test Points"
Hardware Subsystems
  • Radio: nRF9151-LACA-R/R7 selected Rev A hardware candidate with EU band operation, conducted-test provision, pi matching network, and replaceable external antenna interface; the selected silicon does not prove mesh or final stack suitability.
  • Application/audio processing: do not assume a second MCU is required; first evaluate whether the selected radio SoC can run codec, encryption, OLED UI, routing, packet scheduler, and mixing.
  • Audio: prefer digital audio after the microphone preamp where practical; include low-power codec or discrete audio chain with electret microphone input, programmable gain, mic bias, mono earpiece driver, sidetone support, protection, RF filtering, and test points.
  • Power: USB-C input protection, USB-C advertised-current detection, charger, power-path management, removable protected 18650 cell, fuel gauge, NTC monitoring, system rail, 3.3 V digital rail, filtered analog/audio rail, and possibly dedicated radio rail.
  • UI: OLED, volume/mute encoder, logical-channel rotary switch, menu button, power switch.
  • Debug/test: SWD, UART log, reset/recovery/boot access, RF test point, audio test points, rail test points, and subsystem current jumpers.
Interfaces and Connections
  • External antenna: mechanically robust locking SMA-class replaceable antenna interface for the European DECT NR+ band; reserve at least 25 mm clearance between antenna and battery.
  • Headset: Kenwood K1 two-pin accessory interface using 3.5 mm and 2.5 mm jacks at approximately 11 mm spacing; exact accessory wiring must be measured before production.
  • USB-C: 5 V sink for charging and optional service/debug data; do not assume USB-PD voltages unless a PD sink controller is deliberately added.
  • Battery: removable KeepPower P1835J protected button-top 18650, maximum envelope 18.65 × 69.25 mm (±0.2 mm), in MPD BK-18650-PC2 through-hole holder, with temperature sensing, reverse-insertion mitigation, and hot-swap validation.
  • Programming/debug: SWD and UART logging headers.
Power and Runtime Expectations
  • Source: one removable protected 18650 Li-ion cell.
  • Runtime target: at least 6 h, preferably 10-12 h under realistic intercom use.
  • Charging: device remains operational from USB-C power while safely charging the cell.
  • USB-C input: support advertised 5 V Type-C current levels; do not draw more than the detected source capability.
  • Revision A default charge current: 1.0 A until the approved cell, enclosure, NTC placement, and charger layout are validated.
  • Revision A normal charge-current option: 1.5 A is allowed only for an approved cell and validated thermals.
  • Revision A engineering-only charge-current option: 2.0 A may be tested only after confirming cell datasheet support, USB-C 3 A advertisement or equivalent input margin, enclosure thermals, and simultaneous system load behavior.
  • BQ25895 safe-default requirement: charger shall not be allowed to charge at its 2.048 A reset/default fast-charge current before firmware has configured safe settings.
  • Conservative Phase 1 recommendation remains: use switch-mode charger/power path for charge currents above about 1 A; linear chargers at 1.5-2 A are thermally risky from 5 V.
  • Phase 2 validated battery-management direction: BQ25895-class 1S switch-mode charger/power path, MAX17055-class fuel gauge with current sensing, and TUSB320LAI-class USB-C current detection.
  • Battery sourcing split: the P1835J cell is procured and inserted separately because JLCPCB does not process batteries for assembly; the BK-18650-PC2 holder is a PCB-compatible THT item but is not confirmed as JLCPCB assembly-stocked and may require hand installation, consignment, or special sourcing.
Power Tree and Power Budget
Initial rails expected:

Table


RailPurposeNotes
USB_VBUSUSB-C 5 V inputESD/protection, current detection, input-current limit policy required
BAT_PROTProtected removable 18650 cellIncludes cell protection, fuse/overcurrent strategy, reverse insertion mitigation if practical
BAT_SENSEBattery current-sense path10 mΩ Kelvin sense resistor for MAX17055, placed to measure charge and discharge
SYSCharger/power-path system railPowers device from USB or battery without unsafe backfeed
3V3_DIGOptional companion MCU, controls, OLED logic and digital peripheralsTPS63802 buck-boost selected preliminarily
3V3_RF or radio-specific railDECT NR+ radio supply as required by final reference designFiltering and local decoupling required
3V3_AUD or 3V0_AUDCodec, mic bias, analog audioFiltered LDO from digital rail if noise requires it
OLED supplyOLED panel/module supplyKeep display switching currents away from audio and RF
Phase 1 battery budget is preliminary and must be validated on development kits and prototype hardware. Before freezing regulators, protection, fuses, inductors, connectors, and charge-current settings, complete a detailed rail-by-rail power budget and reflect all downstream loads through SYS, BAT, and USB_VBUS.
Phase 2 preliminary selection uses nRF9151 directly from SYS, a TPS63802DLAR 3.3 V buck-boost rail for digital/UI loads and an optional companion MCU, and a TPS7A2030PDBVR 3.0 V low-noise audio rail. The detailed assumptions and single-SoC versus companion-MCU cases are recorded in the Phase 2 Architecture and Component Selection file and remain subject to development-kit benchmarks.
Battery-Management Requirements
  • Locked cell: KeepPower P1835J, protected button-top, 3500 mAh typical / 3350 mAh minimum, 3.7 V nominal, 4.2 V maximum charge voltage, maximum mechanical envelope 18.65 mm diameter × 69.25 mm length (±0.2 mm).
  • Locked holder: MPD BK-18650-PC2, single-cell open holder with two through-hole PC pins and approximately 21.4 mm height above PCB.
  • The P1835J shall be purchased separately and installed after PCBA. JLCPCB battery assembly/consignment shall not be assumed.
  • JLCPCB catalog record C9900045649 for BK-18650-PC2 does not constitute confirmed usable assembly stock. BOM planning shall allow hand installation, consignment/special sourcing, or local post-assembly installation.
  • MYOUNG BH-18650-B1BA002 / C2988620 is explicitly rejected for the P1835J because compatibility with the selected protected button-top 69.25 mm cell is not demonstrated and the researched path is flat-top-oriented.
  • Exact protected-cell fit, holder current/contact performance, insertion/removal force, wrap abrasion, polarity, and NTC pressure are incoming-inspection and prototype gates.
  • Preferred charger / power-path IC: BQ25895RTWT.
  • Preferred fuel gauge: MAX17055ETB+T.
  • Preferred USB-C current detector: TUSB320LAIRWBR configured as UFP/sink.
  • Preferred MAX17055 sense resistor: 10 mΩ, 1% or better, 0.25 W minimum, 0.5 W preferred, 4-terminal/Kelvin preferred.
  • BQ25895 CE or equivalent control shall default to charge-disabled until firmware configures safe charger settings.
  • BQ25895 ILIM shall provide a conservative hardware input-current ceiling; default population around a 1.5 A ceiling is preferred, with a documented test option if higher-current validation is needed.
  • Firmware shall set BQ25895 charge current, charge voltage, input current limit, watchdog behavior, and high-voltage adapter behavior before enabling charging.
  • Firmware shall use TUSB320LAI OUT1/OUT2 or I2C current-detect result to cap BQ25895 input current.
  • MaxCharge/HVDCP high-voltage adapter behavior shall remain disabled unless deliberately adopted later.
  • BQ25895 TS shall connect to a 10 kΩ NTC thermally coupled to the removable cell or cell compartment; charging shall suspend outside the approved cell temperature range.
  • For a 103AT NTC with a 0°C to 45°C Li-ion charge window, the BQ25895 datasheet example uses RT1 = 5.21 kΩ and RT2 = 29.87 kΩ; final values must be checked against the selected NTC and mechanical placement.
  • MAX17055 temperature shall use an external thermistor if practical; otherwise internal-temperature use must be documented as a Rev A SOC-accuracy limitation.
  • Do not directly share one NTC node between BQ25895 and MAX17055 unless both bias schemes are verified.
  • The design shall handle USB plugged with no battery, battery insertion while USB is plugged, battery removal while USB is plugged, deeply discharged/protector-open cells, protected-cell trip/recovery, I2C failure, MCU reset, TUSB320LAI fault, and NTC open/short.
  • Reverse-insertion mitigation is required through mechanical holder choice, electrical protection, or both.
Manufacturing and Assembly Expectations
  • Revision A: professional PCB assembly, conservative spacing, accessible probing, not optimized for size.
  • PCB manufacturer: JLCPCB.
  • Use JLCPCB standard capabilities: Shengyi S1000-2M, 6 layers, 1.6 mm nominal standard stackup unless mechanical design changes it, ENIG, epoxy-filled/capped through vias where required and available as a standard option, horizontal electroless copper plating, and controlled impedance.
  • No exotic PCB technologies: no blind vias, no buried vias, no HDI microvias, and no unusual material/copper processes unless explicitly justified and approved.
  • Standard JLCPCB 6-layer stackup options from the user's reference include JLC06161H-3313, JLC06161H-7628, JLC06161H-1080, JLC06161H-2116A/B, JLC06161H-3313C/D/E, JLC06161H-1080A/B, and JLC06161H-7628A/B; final selection happens during layout setup using the JLCPCB impedance calculator.
  • Use available, non-obsolete components with documented datasheets and reference circuits.
  • Selected assembly-friendly central parts currently include ES8388 C365736, TPS63802DLAR C2845237, TPS7A2030PDBVR C963429, nRF5340-QKAA-R companion fallback C3015611, and HS13L03W2C01 OLED C7465997. Stock must be rechecked at BOM lock. nRF9151 is cataloged by JLCPCB/LCSC but current JLC assembly stock was not confirmed and may require pre-order or consignment.
  • Provide mounting holes and reinforcement around user-force points: USB-C, antenna, headset jacks, rotary controls, and belt-clip area.
Firmware-Relevant Hardware Requirements
  • Unique device identity and persistent trusted-peer credentials.
  • Network identity, authenticated pairing, encrypted voice/control data, and replay protection.
  • Physical pairing and lost-device removal flows.
  • Codec support, jitter buffering, packet loss concealment, local audio mixing, sidetone, AGC/noise suppression/high-pass filtering, output limiting.
  • Coordinator election and recovery logic if using FT/PT star networking.
  • Diagnostic display pages for peer list, link quality, battery/runtime, firmware version, device/network IDs, radio diagnostics, and errors.
  • Battery firmware shall log MAX17055 voltage, current, SOC, capacity, temperature, and alerts.
  • Charger firmware shall log BQ25895 charge state, fault state, input DPM, thermal regulation, TS state, input current, charge current, VBUS, SYS, and BAT readings where available.
  • USB-C firmware shall log TUSB320LAI attach state, orientation if used, and advertised current mode.
  • Firmware shall never enable 2.0 A charging as a normal user mode until validation passes.
Physical Design Expectations
  • Belt-worn plastic enclosure assumed until RF/mechanical analysis says otherwise.
  • Edge-accessible antenna, Kenwood K1 jacks, USB-C, power switch, volume encoder, channel selector, menu button, OLED, and battery access.
  • Keep antenna isolated from battery, OLED, USB-C, audio, and the user's body as much as practical.
  • Separate RF, digital, power, and analog audio placement zones.
  • Battery holder/enclosure shall support the locked P1835J maximum 18.65 × 69.25 mm envelope plus tolerance, spring travel, insertion angle, NTC contact, removal access, and wrapper protection.
  • NTC placement shall thermally track the cell, not only the charger PCB.
  • Preserve at least 25 mm battery-to-antenna clearance, measured from the cell/holder envelope to the RF antenna/connector keepout as defined during mechanical layout.
Important Design Decisions
  • Phase 1 recommendation: proceed only as a four-node one-hop prototype with elected coordinator fallback, not as a guaranteed mesh product.
  • Nordic nRF9151 remains a valid DECT NR+ candidate, but current public Nordic implementation does not directly provide mesh/multi-hop routing.
  • Do not assume nRF9151 is final or that a second MCU is required; compare available DECT/DECT NR+ SoCs and evaluate whether the selected radio SoC alone can run codec, encryption, OLED UI, routing, packet scheduler, and mixing.
  • Preferred codec ranking is Opus, then LC3, then ADPCM, then PCM.
  • Mechanically preferred antenna direction: locking enclosure-mounted bulkhead SMA with internal coax/U.FL-to-board connection and strain relief; board-edge SMA may be acceptable for a reinforced development prototype.
  • Phase 2 battery-management decision: use MAX17055ETB+T as the preferred fuel gauge, BQ25895RTWT as the preferred charger/power-path IC, and TUSB320LAIRWBR as the preferred USB-C advertised-current detector for Rev A.
  • Phase 2 battery mechanical decision: KeepPower P1835J plus MPD BK-18650-PC2, with separately procured cell and holder assembly-stock caveat; reject C2988620.
  • Phase 2 radio decision: nRF9151-LACA-R/R7 is the selected Rev A DECT NR+ hardware candidate; nRF9161 is the mature fallback, nRF9131 is a cost/size future option with extra PMIC/crystal/calibration burden, and Last Mile LM10xx remains future/unverified for Rev A sourcing.
  • Phase 2 processor partition: start with a single-nRF9151 benchmark path, not a final proof. Add nRF5340-QKAA-R as the selected companion-MCU fallback if Opus/LC3, encryption, UI, scheduler, mixing, and radio-control benchmarks do not retain at least 30% CPU and 25% RAM headroom under worst case.
  • Phase 2 audio direction: ES8388 is the JLCPCB/LCSC-friendly selected codec/front-end candidate; TLV320AIC3204 is the higher-documentation fallback if microphone bias, noise, or accessory-drive validation fails.
  • Phase 2 UI direction: HS13L03W2C01 / C7465997 1.3-inch 128×64 white SH1106 I2C OLED is the selected sourcing baseline, subject to exact FPC/connector and assembly-method validation.
  • Keep MAX17048 as the simpler fallback gauge; avoid BQ25792/BQ25672/MP2731 for Rev A unless requirements change.
  • Treat USB-C 5 V / 3 A as an available advertised source capability, not as a default draw permission.
Assumptions
  • European operation in the 1880-1900 MHz DECT allocation.
  • Four beltpacks in the first system.
  • One mono earpiece and external headset PTT; no internal speaker, buzzer, or vibration motor.
  • KeepPower P1835J protected removable cell, 3500 mAh typical / 3350 mAh minimum, is the Rev A runtime and mechanical baseline.
  • Production accessory pinout cannot be assumed; K1 headset variants must be measured.
  • RF range, antenna tuning, thermal behavior, codec CPU load, and DECT NR+ latency must be measured before production claims.
  • Battery-management validation assumes a 4.2 V-class 1S Li-ion protected 18650; final charge current depends on the approved cell datasheet.
Change Notes
  • Initial specification created from the user's Phase 1 design prompt.
  • Project renamed from the generated draft name to DECT NR+ Intercom Beltpack.
  • Phase 2 battery-management constraints added: JLCPCB standard 6-layer stackup assumptions, no exotic PCB technologies, MAX17055 fuel gauge direction, BQ25895 charger/power-path direction, and conservative charge-current policy.
  • Battery-management validation completed before schematic capture: added TUSB320LAI USB-C current detection, BQ25895 safe-default requirements, MAX17055 10 mΩ Kelvin-sense requirements, NTC/cell-temperature requirements, protected-cell hot-swap/reverse-insertion validation, and no-2.0-A-charge-without-validation rule.
  • Locked KeepPower P1835J and MPD BK-18650-PC2; documented the cell/holder sourcing split, rejected C2988620, preserved the 25 mm antenna clearance, and added holder fit/current/NTC incoming-inspection gates.
  • Added Phase 2 radio, processor-partition, codec, OLED, and regulator directions with a preliminary rail budget and explicit benchmark gates; no schematic or PCB work started.
  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Battery-Management Requirements

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Change Notes