1. No schematic capture may begin until this validation report and the project specification are treated as the battery-management requirements baseline.
2. BQ25895 charge enable must be deterministic at boot. The charger CE pin shall default to charge-disabled, or an equivalent hardware-safe state, until firmware has configured charge voltage, charge current, input current, watchdog, and safety behavior.
3. Rev A normal charge current shall default to 1.0 A. A 1.5 A normal option is allowed only after the approved cell is selected and the NTC/thermal layout is validated.
4. 2.0 A charging is engineering-validation only. It shall be disabled in normal firmware and enabled only after cell datasheet, USB-C input capability, enclosure thermal, and simultaneous-system-load tests pass.
5. USB-C input current shall follow actual advertised capability. A fixed Rd-only USB-C sink is not enough for this design if charging above conservative default USB current is allowed.
6. Battery temperature sensing is mandatory. BQ25895 TS shall be connected to an NTC thermally coupled to the removable cell or mounted in the cell compartment with validated correlation to cell surface temperature.
7. Treat the protected 18650 as secondary protection only. The beltpack PCB must still handle reverse insertion, absence, hot insertion/removal, protector-open behavior, and charger faults.
8. Use JLCPCB standard capabilities only: Shengyi S1000-2M, 6 layers, ENIG, controlled impedance, standard through vias, epoxy-filled/capped vias only where available as a standard JLCPCB option, and no blind/buried/HDI microvias.

• Value: 10 mΩ.
• Tolerance: 1% or better.
• Power rating: 0.25 W minimum; 0.5 W preferred.
• Package: 4-terminal/Kelvin current-sense resistor preferred.
• Temperature coefficient: low-TCR preferred for fuel-gauge accuracy.

• Place MAX17055 near the battery holder/connector and sense resistor.
• Put the sense resistor in the battery current path so both charge and discharge current are measured.
• Route CSP and CSN as a quiet Kelvin pair directly to the sense resistor pads.
• Do not share the Kelvin traces with charger, system, or battery current.
• Avoid vias on Kelvin traces where possible.
• Keep the gauge and sense lines away from the BQ25895 SW node, inductor, USB VBUS surge paths, OLED switching currents, RF feed, and audio inputs.
• Add test points for BAT+, BAT-/PACK reference, CSP, CSN if safe, I2C, ALRT, and gauge temperature input.
• Verify sign convention in firmware: charge and discharge polarity must match the MAX17055 configuration.

1. Preferred: provide a second 10 kΩ NTC thermally coupled to the cell compartment for MAX17055 THRM/AIN, separate from the BQ25895 TS safety NTC.
2. Acceptable for Rev A validation: use BQ25895 TS as the safety NTC and let MAX17055 use internal temperature, but document reduced SOC accuracy under charge/discharge thermal gradients.

1. CE defaults to charge-disabled using a resistor or equivalent safe hardware state.
2. MCU boots from SYS when USB is present.
3. Firmware verifies charger identity over I2C.
4. Firmware disables or services charger watchdog intentionally.
5. Firmware sets:
   • Charge voltage for the approved cell, normally 4.2 V class.
   • Fast-charge current initially 1.024 A or another exact BQ25895 register value at or below 1.0 A target.
   • Pre-charge and termination current appropriate for the approved cell.
   • Input-current limit based on TUSB320LAI result.
   • MaxCharge/HVDCP high-voltage adapter behavior disabled unless explicitly adopted later.
6. Firmware reads charger status/fault/ADC and TS state.
7. Only then may firmware assert CE low to enable charging.

• Populate ILIM for a conservative hardware input-current ceiling, initially around 1.5 A using the datasheet example class of resistor value.
• Add a resistor option or solder-jumper/test variant if 2.0 A charge validation needs a higher input ceiling.
• Keep EN_ILIM enabled unless there is a documented reason to disable it.
• Remember: ILIM limits input current, not battery charge current directly.

• Do not assume 9 V, 12 V, 15 V, or 20 V input.
• Do not use HUSB238A, STUSB4500, or FUSB302B unless USB-PD is deliberately added.
• HUSB238A is technically available and capable, but overqualified for simple 5 V current detection.
• FUSB302B requires substantial PD policy-engine firmware and is not the simple path.
• STUSB1602A was found as a possible Flux/LCSC part, but TUSB320LAI remains simpler for this 5 V sink-current detection requirement.

• Select one approved protected button-top 18650 before production layout freeze.
• Design the holder/enclosure for at least 70 mm protected-cell length class unless a shorter exact cell is locked.
• Confirm holder spring/contact rating for worst-case system current and charge current.
• Provide mechanical polarity guidance and, where practical, keyed geometry.
• Add electrical reverse-polarity protection or a protection strategy that prevents charger/gauge damage if a cell is inserted backwards.
• Define whether unprotected flat-top cells are mechanically/electrically rejected or only discouraged.

• NTC type: 10 kΩ 103AT-class NTC or exact equivalent used by the BQ25895 datasheet example.
• Charge window: 0°C to 45°C minimum, matching the datasheet example network.
• Example divider values from BQ25895 datasheet for 103AT and 0°C to 45°C: RT1 = 5.21 kΩ, RT2 = 29.87 kΩ.
• Physical placement: NTC shall touch or closely track the cylindrical cell surface, ideally with a spring/contact feature or thermally coupled holder feature.

• Suspend charge on charger TS fault.
• Log TS fault, thermal regulation, input DPM, and charger fault registers.
• Reduce charge current before hard cutoff where possible.
• Disable 2.0 A charge unless cell surface and charger PCB temperature pass in closed-enclosure, high-ambient, simultaneous-system-load tests.

• USB-C receptacle with CC1/CC2 routed to TUSB320LAI.
• TUSB320LAI configured as UFP/sink only.
• OUT1/OUT2 routed to MCU GPIOs; I2C routed if pin budget allows.
• USB VBUS ESD/protection and suitable input capacitance.
• CC ESD protection compatible with Type-C signaling.
• No assumption of USB-PD voltages.
• Decide whether USB D+/D- are used for service/debug, BQ25895 BC1.2 detection, or left unused with proper ESD/handling.

• CE or equivalent control defaults to charge-disabled until firmware configures safe registers.
• ILIM populated for conservative hardware input-current ceiling.
• STAT and INT routed to MCU.
• I2C routed to MCU with suitable pull-ups.
• QON / BATFET reset/ship-mode behavior intentionally connected or safely tied.
• TS connected to physical cell-temperature NTC divider.
• Inductor, input capacitors, SYS capacitors, BAT capacitors, BTST capacitor, REGN capacitor, and all support components follow TI reference guidance.
• Thermal pad soldered to ground copper with enough standard through thermal vias.
• SW node small and isolated from audio, RF, fuel-gauge sense, and USB CC.

• 10 mΩ Kelvin current-sense resistor in battery current path.
• CSP/CSN Kelvin routed directly to sense resistor.
• Gauge BAT, REG, decoupling, I2C, ALRT, and optional THRM/AIN routed per datasheet.
• Gauge placed away from charger switching loop.
• Test points or safe probe access for gauge bring-up.

• Holder sized for selected protected button-top 18650 length class.
• Reverse-insertion mitigation included.
• Battery contacts current-rated with margin.
• BAT path copper sized for charge/discharge and validation currents.
• Battery absent/protector-open behavior explicitly testable.

• USB VBUS.
• Charger PMID/input node.
• SYS.
• BAT+ and BAT return.
• Charger TS.
• ILIM.
• STAT and INT.
• Charger I2C and gauge I2C.
• TUSB320LAI OUT1/OUT2 and optionally CC1/CC2 through safe high-impedance/probe points.
• MAX17055 ALRT.
• Sense resistor Kelvin nodes if they can be probed without creating short risk.

• Shengyi S1000-2M.
• 6 layers.
• ENIG.
• Controlled impedance.
• Standard through vias.
• Epoxy-filled/capped vias only where ordered as a standard JLCPCB option.
• Horizontal electroless copper plating.
• No blind vias, buried vias, HDI microvias, exotic dielectric, or unusual copper process.

• Use a solid ground plane directly beneath the charger if compatible with final stackup.
• Keep the BQ25895 high-frequency current loop compact on the component layer.
• Use enough copper and thermal vias for charger heat spreading.
• Keep MAX17055 sense traces quiet and short.
• Keep charger SW/inductor away from antenna feed, audio inputs, mic bias, headset connector filtering, and OLED routing.
• Final stackup shall be selected from standard JLCPCB 6-layer options during layout setup using the JLCPCB impedance calculator.

• Charge at 1.0 A with approved protected cell, enclosure open and closed.
• Charge at 1.5 A with approved protected cell, enclosure open and closed.
• Measure cell surface, charger IC/inductor, PCB ambient, and enclosure surface temperature.
• Validate NTC reading versus actual cell surface temperature.
• Validate USB-C default, 1.5 A, and 3.0 A source detection.
• Validate input current limit never exceeds advertised source capability.
• Validate simultaneous charging and worst-case radio/audio/OLED load.
• Validate battery absent, hot insertion, removal, reverse-insertion attempt, protector-open, and deeply discharged cell cases.

• Use only a cell whose datasheet permits 2.0 A or higher charging.
• Use a USB-C source advertising enough current with margin.
• Run closed-enclosure high-ambient thermal testing.
• Run simultaneous system-load charging tests.
• Confirm charger thermal regulation is not the normal operating mode.
• Confirm cell surface remains within the approved cell charge-temperature limit.
• Enable only through engineering firmware/configuration until product validation passes.