Linux Cyberdeck Design

flux

There’s still a moderate amount left before this is a full manufacturable board. The first-pass schematic is started, but we are not ready for PCB layout/manufacturing yet.
Main things still left to figure out
  1. Display connection
    • Exact Waveshare 6.25" DSI LCD-B connector pinout
    • DSI lane count
    • Backlight power/current
    • Touch interface, if any
    • Correct FPC connector part
  2. Battery and power
    • Exact 10,000 mAh battery pack
    • Battery connector/current rating
    • Battery protection/NTC details
    • Confirm charger settings for that pack
    • Validate 5 V boost converter can handle CM5 + LTE + display + USB-A peaks
  3. Protection parts
    • USB-C ESD protection
    • USB-A USB 3.0 ESD protection
    • HDMI ESD protection
    • SIM card ESD protection
    • Possibly battery/input fuse or protection
  4. Regulator final values
    • Final inductor part numbers
    • Capacitor voltage/package choices
    • TPS61288 compensation check
    • Thermal/current margin check
    • Layout-sensitive switching-node constraints
  5. CM5 details
    • Decide whether to add RTC backup for CM5 VBAT
    • Decide whether to expose nRPIBOOT/service pads
    • Confirm GPIO assignments for LTE, audio, IMU, keyboard wake
  6. LTE/SIM7600 details
    • Confirm exact SIM7600G-H-M.2 hardware guide handling for VDD_AUX and VDD_1V8
    • Confirm LTE/GNSS antenna connector placement strategy
    • Add SIM ESD
    • Add RF/layout keepout rules
  7. Keyboard board
    • Main-board FPC is planned, but keyboard PCB itself still needs to be designed
    • Need switch/keycap sourcing
    • Need keyboard RP2040 schematic/firmware pin map finalized
  8. Mechanical basics
    • Rough board size
    • Port locations
    • Battery location
    • Screen/keyboard placement constraints
    • Mounting holes
    • Antenna placement/keepouts
  9. PCB layout setup
    • Stackup choice, likely 6-layer because of USB 3.0, HDMI, MIPI DSI, RF, and power density
    • Controlled-impedance rules
    • Differential-pair rules
    • Power trace/current rules
    • Thermal copper areas
  10. Bring-up and manufacturing prep
  • Test pads
  • Debug headers
  • Board bring-up checklist
  • BOM cleanup
  • Footprint review
  • DRC
  • Gerbers/BOM/pick-and-place
My estimate
Schematic is roughly 55–65% figured out.
Full board readiness is more like 30–40% complete, because layout, power validation, protection, display details, and mechanical constraints are still significant.
The biggest blockers are:
  1. Exact display connector/pinout
  2. Exact battery pack
  3. Power validation for the 5 V rail
  4. ESD/protection parts
  5. Mechanical board size/port placement
  6. Keyboard PCB design
Once those are decided, the remaining work becomes much more straightforward.
Power, display, protection
Find display pinout
Validate power rail
Add protection parts
Add test pads
Review battery connector

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Files

Schematic

Layout

3D View

Keyboard Layout — Linux Cyberdeck
Status
Confirmed keyboard layout direction. Switch/keycap part numbers remain TBD-sourcing.
Physical Layout
  • Style: Preonic-style 5 x 12 ortholinear layout, terminal-biased.
  • Key count: 60 keys.
  • Key field: approximately 114 x 47.5 mm.
  • PCB target: approximately 118 x 58 mm.
  • Key pitch: 9.5 mm.
  • Key type: tactile switches with keycaps.
  • Switch/keycap part numbers: TBD-sourcing.
  • Backlight: no in rev 1; reserve PWM + FET + LED footprints as stuffing option.
Base Layer
  • Proven 60-key ortholinear / Preonic-style base.
  • Terminal-biased modifier placement.
  • Ctrl on home-row corner.
  • Two thumb Space keys.
  • Sym on both thumbs.
  • QWERTY + number row.
  • Arrows bottom-right.
Sym Layer
  • Missing ASCII characters clustered on the right hand.
  • Sym layer accessed from both thumb Sym keys.
Fn Layer
  • F1–F12.
  • Brightness and volume on arrow cluster.
  • Navigation cluster.
  • Display brightness keys send consumer-control codes via QMK and are handled in Linux via /sys/class/backlight.
Electrical Architecture
Diagram



  
    
  
  
    
  












5x12 Key Matrix
RP2040 Keyboard MCU
QMK Firmware
6-pin FPC to Main Board
CM5/Internal USB HID Path
WAKE to CM5 Pin 92 PWR_BUTTON Domain
Matrix and RP2040 Pin Plan
  • Matrix: 5 rows x 12 columns.
  • MCU: RP2040 on keyboard PCB.
  • Firmware: QMK.
  • Interface to main board: USB HID over FPC.
  • Wake sideband retained.
  • Detailed row/column GPIO assignments are included in the schematic pin plan and may be adjusted during routing to simplify the keyboard PCB.
6-pin FPC Pinout

Table

PinSignalNotes
1GNDReturn
2+5V or +3V3_KBDFinal rail selected during schematic; use one keyboard supply rail only
3USB_D+Keyboard USB HID
4USB_D-Keyboard USB HID
5WAKEWake line to CM5 pin 92 / PWR_BUTTON behavior domain per confirmed decisions
6KBD_BOOT/RESET or spare GPIOUsed for RP2040 service/programming or reserved spare
Notes for Schematic Capture
  • Do not scan the keyboard matrix directly with CM5 GPIO.
  • Put ESD/series protection as appropriate on the FPC interface.
  • Include SWD pads for keyboard RP2040 under the service hatch.
  • Include BOOTSEL/reflash access so Linux can recover/update keyboard firmware if needed.
  • Keep switch/keycap footprints selectable until final sourcing is complete.

  • Status

  • Physical Layout

  • Base Layer

  • Sym Layer

  • Fn Layer

  • Electrical Architecture

  • Matrix and RP2040 Pin Plan

  • 6-pin FPC Pinout

  • Notes for Schematic Capture