Project Start
J_TX_RF_STAGE is flush on the left edge; U_TX_CTRL is rotated to face its antenna pins toward that edge; J_TX_DATA and J_TX_HK are aligned in a 12 mm-spaced pair to the right. The antenna-side corridor is clear of the data connectors.U_RX_CTRL, protection, media bridge, and receiver support parts. The existing safe low-voltage nets—including RX_VBUS_PROTECTED, GND, USB 2.0, USB-C CC/SuperSpeed, and I²C—are already defined.U_MFI_LIGHTNING, U_MFI_30PIN) are intentionally excluded from the PCB and have no defined physical package, so they cannot be placed until an approved MFi part/package or an explicitly generic placeholder footprint is selected.