DOGS Placement Eval Run
Table
| Item | Status | Evidence / blocker |
|---|---|---|
| Live rules, stackup, power budget/spec review | Completed | Low Density Profile (SMD) v3; Standard 4 Layer v1; 35 µm copper on all four copper layers; 50 × 60 mm, existing 1 mm corners |
| Individual power widths and GND default | Completed, screening assumptions below | Ten rulesets in first batch, one residual control-width ruleset in second bounded pass; no current-required power width reduced to suppress a warning |
| Neckdown generation | Completed | Each of two generate calls reported 46; final inventory is 46 routeSegment nodes, not 92, plus two existing vias |
| USB data-pair determination | Completed | J1 DN1, DN2, DP1, DP2 explicitly no-connect; SBU1/SBU2 also no-connect |
| Protected USB data breakout | Unattempted intentionally / not applicable | No connected USB data pair exists; no breakout authored |
| U6 overlap investigation | Completed diagnostic investigation; correction blocked | Custom-pad/clearance representation conflict described below; datasheet numerical land-pattern extraction insufficient for safe geometry replacement |
| U6 footprint correction | Unattempted intentionally | No verified replacement geometry; do not shrink or replace its thermal pad to make a warning disappear |
| L3/L4/L5/L6 live footprint inspection | Completed | Package names and numerical live geometry recorded below; no speculative replacements |
| Recheck after corrections | Completed | Three total checks, ending at 30 anomalies; stopped within requested bound |
| Clear all routing prerequisites | Failed / blocked | Exact residual pin list below; manufacturing-clearance/profile and custom-pad questions remain in addition to placement advisories |
| Whole-board regeneration / placement edits / auto-route | Unattempted intentionally | Prohibited scope |
power-budget-design-notes and project-specification, not freshly certified protection tolerances. The former has stale L5/L6 entries; live BOM takes precedence for inductors. The specification's old 70-net count is stale; live preflight is 71.I = 0.048 × ΔT^0.44 × A^0.725, with A in mil², 35 µm copper and 10 °C rise. These are conservative planning widths, not IPC-2152 thermal validation, guaranteed fault-current ratings, or voltage-drop signoff. Apply these widths to outer-layer power conductors; inner-layer power routing needs fresh sizing. Short fine-pitch neckdowns require local copper spreading, RMS/temperature and via-current review after routing. Wide traces do not validate the converter's loop geometry.Table
| Exact nets | Width | Current basis |
|---|---|---|
| GND | 0.20 mm | Applied manufacturing minimum for stitching only. It is not a sufficient sole return conductor for system current; continuous GND planes/local return copper must be checked before routing signoff. |
| USB_VBUS_RAW, USB_5V_PROT | 1.00 mm | 1.5 A guaranteed source; documented U10 2.25 A high corner used as screening envelope; calculated 0.919 mm |
| SOLAR_PROT | 0.85 mm | 1.67 A × 1.25 = 2.0875 A; calculated 0.829 mm |
| MUX_OUT | 0.75 mm | Charger input high corner 1.50 A × 1.25 = 1.875 A; calculated 0.715 mm |
| BATTERY, SYS_PRE_UVLO, SYS_BAT, CHARGER_SW | 1.40 mm | 3 A planning envelope; max normal battery-only load about 1.63 A, 25% margin about 2.04 A. Charger/system charging headroom included. CHARGER_SW 3 A RMS envelope is an assumption, not a peak-current/fault guarantee; calculated 1.367 mm |
| 3V3_RAW, 3V3_OUT | 0.25 mm | 500 mA required; 0.64 A nominal protection × 1.25 = 0.8 A screening; calculated 0.221 mm |
| AUX5_RAW, AUX12_RAW, AUX_OUT | 0.45 mm | AUX5 500 mA / AUX12 100 mA normal; approximately 1 A isolation target × 1.25 = 1.25 A screening; calculated 0.409 mm. Not the guaranteed eFuse worst-case corner. |
| 3V3_SW1, 3V3_SW2, AUX12_SW | 0.60 mm | Budget 3V3 input 0.647 A and AUX12 input 0.50 A at 3 V battery. Conservative 1.5 A RMS envelope with ripple headroom; calculated 0.526 mm. Final waveform check remains required. |
| AUX5_SW1, AUX5_SW2 | 0.85 mm | Budget 0.98 A input at 3 V; conservative 2.1 A RMS envelope with ripple headroom; final waveform check remains required. |
traceWidth; none changes clearances or geometry.Table
| Name | UID |
|---|---|
| Preflight ground stitching width | b5b07702-2165-4e95-acef-e9f3b2b08013 |
| Preflight low current control widths | cc66af29-8315-4635-aae3-25c6174b960d |
| Preflight USB power 2.25 A | cdb631ae-4755-48d0-aa00-1d0fb28e6532 |
| Preflight solar power 2.09 A | 4d39c17e-3a8b-4175-939b-9ddc75955fc3 |
| Preflight charger input 1.875 A | adb2431a-3e08-4312-bd11-4c17dc7b1690 |
| Preflight system battery charger switch 3 A | c09db744-a992-4356-9f4b-8e8df29f8783 |
| Preflight 3V3 output 0.8 A | b06a9706-b54b-4d85-8a30-5a2acc04fa6d |
| Preflight AUX power 1.25 A | 305eba42-f188-48c9-8908-3e1393379da4 |
| Preflight 3V3 and 12V switch 1.5 A | 7b1f89d3-ade2-4ca3-b49b-18ffd734f1e8 |
| Preflight 5V switch 2.1 A | 2027d3ee-a042-45bd-a3fc-a18a758ee4a7 |
| Preflight residual low-current IC escapes | a3c95361-423e-42bc-ad7a-29bed3f376da |
b6114485-fe8d-4e20-b639-69efba540c98, placed at (0, −14) mm. Its electrical mapping agrees with datasheet pin assignments: VCC 1, SS 10, NC 11/12, AGND 20 and PGND 21.layout_2d renders PGND as 1.6 × 1.6 mm, but published source scene_tree exposes a custom SVG path:Pad clearance (NPTH proxy) matches every pad with keepOut 0.40 mm/minKeepOut 0.30 mm; Pad-to-pad spacing sets pad(0.50 mm); Hole-to-trace spacing also matches every pad/via. Those rules were preserved, not silently relaxed below the applied manufacturing profile.Table
| Part | Live MPN / package | Live local pad geometry | Current board-space footprint bounds |
|---|---|---|---|
| L3 | 74438356015 / SMD_MAPI-4020 | Two 0.98 × 3.70 mm pads, local centers ±1.185 mm | 3.35 × 4.20 mm at (7,18.2) |
| L4 | 74438356015 / SMD_MAPI-4020 | Same as L3 | 3.35 × 4.20 mm at (8,4.2) |
| L5 | 744311150 / SMD_6.8x7.3mm | Two 2.45 × 3.50 mm pads, local centers ±3.025 mm | 8.50 × 6.60 mm at (−6.8,−12.7) |
| L6 | 74438356010 / SMD_MAPI-4020 | Same local geometry as L3; existing 270° rotation | 4.20 × 3.35 mm at (−17.25,−0.2) |
Table
| Pin | Net | Retained width |
|---|---|---|
| J1.VBUS_A | USB_VBUS_RAW | 1.00 mm |
| R4.P1 | USB_5V_PROT | 1.00 mm |
| U10.VIN_1 | USB_VBUS_RAW | 1.00 mm |
| U10.VIN_2 | USB_VBUS_RAW | 1.00 mm |
| U10.VOUT_1 | USB_5V_PROT | 1.00 mm |
| U10.VOUT_2 | USB_5V_PROT | 1.00 mm |
| U2.SW (engine suffix 71e374a5c9b12aaef2f99cb78602b4bf) | CHARGER_SW | 1.40 mm |
Table
| Part | Pins and nets |
|---|---|
| J1 | CC1 → USB_CC1; CC2 → USB_CC2 |
| U10 | DVDT → USB_EFUSE_DVDT; ILM → USB_EFUSE_ILIM |
| U2 | ISET → CHARGER_ISET |
| U3 | EN → U3_SUPPLY_LOGIC |
| U4 | DVDT → 3V3_EFUSE_DVDT; EN/UVLO, IN_1, IN_2 → 3V3_RAW; ILM → 3V3_EFUSE_ILIM |
| U5 | EN → EN_AUX5 |
| U6 | BOOT → AUX12_BOOT |
| U7 | DVDT → AUX5_DVDT; VIN_2 → AUX5_RAW; VOUT_1, VOUT_2 → AUX_OUT |
| U8 | VIN_2 → AUX12_RAW; VOUT_1 → AUX_OUT |
| U9 | DVDT → SYS_UVLO_DVDT; EN/UVLO → SYS_UVLO_SENSE; ILM → SYS_UVLO_ILIM |
get_checks review at 2026-09-15T23:01:10.383Z reports six Switching Power Stage warnings and no returned findings for selected overlapping-copper, pad-access, stackup, missing-footprint and neckdown reviews. This narrower review does not overrule the live preflight's 30 pin exclusions.Disposition
Assigned-scope status
Width/current assumptions
Exact new rulesets
U6 overlap diagnosis
Live inductors — discrepancy report, no replacements
Exact final 30 preflight anomalies
Grouped overlap (1)
Track width exceeds pin size (7)
Inaccessible pins (22)
Independent read-only checks and actual placement advisories
Lead handoff