AvocAudio: A tinyML community board v1
Controls
Properties
Availability & Pricing
Distributor | Qty 1 | |
---|---|---|
Arrow | $12.41–$13.63 | |
Digi-Key | $13.66–$17.50 | |
LCSC | $35.46–$36.70 | |
Mouser | $18.34–$18.55 | |
Verical | $2.84–$3.93 |
Assets
id=oshw-logo
id=microphone
id=flux logo
id=Test Asset v4
id=ESD_(Susceptible)
id=microphone v2
id=ESD_(Susceptible) v2
id=AvocAudio 24 V1
Simulation
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Continuity Test | Verify the continuity of electrical connections | Use a multimeter to check continuity between all connected pins | All connections show continuity (low resistance) |
Power Supply Verification | Ensure appropriate voltage levels | Connect the PCB to a 3.3V power supply | All components receive 3.3V as required |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Component Position Verification | Ensure all components are placed correctly | Visual inspection and comparison with design layout | Components are correctly positioned |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Boot Test | Verify the microcontroller boots correctly | Apply power and reset | Microcontroller boots and enters default operational state |
GPIO Test | Validate GPIO functionality | Configure and toggle each GPIO | GPIOs correctly toggle states |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Transceiver Initialization | Verify LoRa module initializes correctly | Power up and initialize the LoRa module via microcontroller | LoRa module responds to initialization commands |
Data Transmission Test | Validate data transmission via LoRa | Send test data from the microcontroller to the LoRa module | Data is correctly sent and received by another LoRa receiver |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
SD Card Initialization | Verify SD card initializes | Insert SD card and power up the board | SD card initializes and is ready for data operations |
Data Read/Write Test | Validate data read/write operations | Perform read/write operations via microcontroller | Data is correctly written to and read from the SD card |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Microphone Data Capture | Validate audio data capture | Input audio and record data through microphone | Audio data is correctly captured and stored |
Temperature Sensor Data | Verify temperature data accuracy | Measure temperature and compare with reference | Temperature data is accurate within specified tolerance |
Humidity Sensor Data | Verify humidity data accuracy | Measure humidity and compare with reference | Humidity data is accurate within specified tolerance |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Material Verification | Ensure all materials comply with RoHS | Perform material analysis | Materials used are RoHS compliant |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Battery Charge/Discharge Test | Verify battery charging and discharging | Connect battery and monitor charge cycles | Battery correctly charges and discharges |
Solar Power Interface | Validate solar power functionality | Connect solar panel and simulate sunlight conditions | Board operates correctly on solar power input |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Button Press Test | Verify button input operation | Press buttons and observe microcontroller response | Microcontroller correctly detects button presses |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Firmware Upload Test | Verify firmware can be uploaded correctly | Upload test firmware via USB | Firmware uploads successfully and microcontroller executes firmware |
Functional Test | Validate firmware functionality | Execute test routines on microcontroller | Firmware performs all functions as expected |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Temperature Tolerance | Verify board functions under temperature extremes | Cycle device through −40∘C to 85∘C | Device operates without failure under all temperatures |
Table
Test Case | Objective | Condition/Setup | Expected Outcome |
---|---|---|---|
Test Documentation | Ensure comprehensive test documentation | Document all test cases, results, and observations | Complete and accurate test reports |
Plantuml
@startuml robust "Clock Signals" as ClockSignals $$ --> Clock1: SD_CLK $$ --> Clock2: QSPI_SCLK $$ --> Clock3: MIC_BCLK clock Clock1 { SD_CLK: high SD_CLK: low SD_CLK: high SD_CLK: low } clock Clock2 { QSPI_SCLK: high QSPI_SCLK: low QSPI_SCLK: high QSPI_SCLK: low } clock Clock3 { MIC_BCLK: high MIC_BCLK: low MIC_BCLK: high MIC_BCLK: low } @enduml
SD_CLK
, QSPI_SCLK
, and MIC_BCLK
. Each clock cycles through a high and low state. Adjust the high/low cycles as per the timing specifications of your project.Plantuml
@startuml robust "Clock Signals Detailed" as ClockDetailed $$ --> Clock1: SD_CLK $$ --> Clock2: QSPI_SCLK $$ --> Clock3: MIC_BCLK clock Clock1 { SD_CLK: |---|---| SD_CLK: ____|---|____ } clock Clock2 { QSPI_SCLK: |---|---| QSPI_SCLK: ____|---|____ } clock Clock3 { MIC_BCLK: |---|---| MIC_BCLK: ____|---|____ } @enduml
SD_CLK
, QSPI_SCLK
, MIC_BCLK
) has defined periods, indicating higher precision in the clock cycles. Modify the number of cycles and alignments to fit your project's exact requirements.|---|
and __
with appropriate timing intervals that match your needs. If you have specific time intervals in mind, let me know and I can give more detailed examples.Table
From Component | From Pin | To Component | To Pin | Pass |
---|---|---|---|---|
J1 | 7 | U1 | GPIO19 | ☑ |
U1 | VREG_VIN | +3V3 | P1 | ☑ |
+3V3 | P1 | U1 | IOVDD | ☑ |
MK1 | VDD | +3V3 | P1 | ☑ |
C20 | P1 | +3V3 | P1 | ☑ |
J1 | 4 | +3V3 | P1 | ☑ |
R9 | P2 | +3V3 | P1 | ☑ |
U5 | BAT | VBAT | P1 | ☑ |
U5 | VIN | a97a65fdfad65c8223644e8ec97d56f8 | ☑ | |
C27 | P1 | +3V3 | P1 | ☑ |
J6 | PIN_2 | DHT_DATA | P1 | ☑ |
J6 | PIN_1 | +3V3 | P1 | ☑ |
J6 | PIN_4 | GND | P1 | ☑ |
R9 | P1 | U1 | GPIO20 | ☑ |
J1 | 8 | SD_DATA1 | P1 | ☑ |
SW1 | 1 | GND | P1 | ☑ |
Q1 | S | R11 | P1 | ☑ |
L2 | P1 | U4 | LX | ☑ |
U4 | FB | 2e6c9fe27ed33cbe908085a9fb63e615 | ☑ | |
R4 | P1 | ~USB_BOOT | P1 | ☑ |
J5 | 1 | VSOLAR | P1 | ☑ |
Q1 | S | R11 | P1 | ☑ |
U2 | DIIO0 | QSPI_SD0 | P1 | ☑ |
QSPI_SCLK | P1 | U2 | CLK | ☑ |
QSPI_SCLK | P1 | U1 | QSPI_SCLK | ☑ |
J1 | 6 | GND | P1 | ☑ |
U2 | CLK | QSPI_SCLK | P1 | ☑ |
U2 | DOIO1 | QSPI_SD1 | P1 | ☑ |
U2 | VCC | +3V3 | P1 | ☑ |
QSPI_SS | P1 | U1 | QSPI_CSN | ☑ |
QSPI_SS | P1 | U2 | ~CS | ☑ |
J1 | 5 | SD_CLK | P1 | ☑ |
SW2 | 3 | R10 | P1 | ☑ |
J3 | VUSB | USB_D- | P1 | ☑ |
J3 | D- | USB_D- | P1 | ☑ |
J3 | D+ | USB_D+ | P1 | ☑ |
J3 | GND | GND | P1 | ☑ |
LoRA_RX | P1 | U6 | PB6 | ☑ |
U1 | GPIO25 | D2 | P2 | ☑ |
LoRA_NRST | P1 | U6 | RST | ☑ |
LoRA_TX | P1 | U6 | PB7 | ☑ |
R1 | P1 | USB_D- | P1 | ☑ |
USB_D+ | P1 | J3 | D+ | ☑ |
USB_D- | P1 | J3 | D- | ☑ |
R17 | P1 | MK1 | WS | ☑ |
R16 | P1 | MK1 | BCLK | ☑ |
R11 | P1 | U5 | VIN | ☑ |
C15 | P1 | U5 | VIN | ☑ |
R19 | P2 | D2 | P2 | ☑ |
DHT_DATA | P1 | J6 | PIN_2 | ☑ |
C20 | P2 | GND | P1 | ☑ |
R9 | P2 | GND | P1 | ☑ |
SW1 | 1 | GND | P1 | ☑ |
U6 | GND | GND | P1 | ☑ |
U5 | GND | GND | P1 | ☑ |
C16 | P1 | GND | P1 | ☑ |
J5 | 2 | GND | P1 | ☑ |
J6 | PIN_4 | GND | P1 | ☑ |
U5 | TEMP | GND | P1 | ☑ |
R8 | P2 | GND | P1 | ☑ |
Table
Component Designator | Communication Interface | Power Connection | Issue Flagged |
---|---|---|---|
U1: RP2040 | GPIO, SPI, I2C, USB | +3V3, GND | No issues flagged. |
U2: W25Q128JVSIQ | SPI (QSPI) | +3V3, GND | No issues flagged. |
U3: SY6280A AC | None | +3V3, GND | No issues flagged. Connection to U1 for control should be verified. |
U4: RT8059GJ5 | None | +3V3, GND | No issues flagged. Ensure EN pin is properly managed for stable operation. |
U5: CN3063 | None | VBAT, GND | No issues flagged. Check battery charge status pins for proper feedback handling. |
U6: LoRa Module | GPIO | +3V3, GND | Ensure GPIO connections to U1 support appropriate LoRa control and data interface. |
Y1: Crystal | None | GND | No power line needed directly, but grounding and load capacitors issue needs to be addressed. |
MK1: MEMS Microphone | I2S | +3V3, GND | Ensure I2S connections are properly configured on U1. Verify SELECT pin setup. |
D1, D2, D4, D5: LEDs | None | +3V3, GND | Ensure GPIOs used to drive LEDs are correctly configured for output. Check current-limiting resistors. |
Q1: MOSFET | None | VBAT, VSOLAR, GND | Verify logic level compatibility with GPIO driving the gate. Check for back-feed potential on solar input. |
J1: microSD Slot | SPI | +3V3, GND | Check SPI connections for consistency with U1 SPI bus. Ensure card detect switch is properly managed if used. |
J3: USB Connector | USB D+, USB D- | VUSB, GND | Ensure USB data lines are correctly connected to U1. Verify VUSB connection for USB power source selection. |
J4: Antenna Connector | RF | GND | No issues flagged. Correct impedance match required. |
J5, J6: Connectors for Sensors | GPIO, 1-Wire, etc. | +3V3, GND | Ensure sensor data lines are appropriately configured on U1 GPIOs. Check for required pull-up resistors on 1-Wire bus. |
SW1, SW2: Switches | GPIO | +3V3, GND | Ensure switches are properly debounced either in hardware or software if connected directly to GPIOs. |
R6, R9: Pull-up for SD Card | None | +3V3 | No issues flagged. Verify pull-up values are suitable for SD card interface speeds. |
C8, C11 and others: Decoupling Capacitors | None | +3V3, GND | No issues flagged. Check placement for closeness to respective power pins of ICs. |
C27: RF filter Capacitor | None | +3V3, GND | Location and value need verification for effectiveness at the operating frequency. |
Table
Net Name | Signal Type | Recommended Trace Width (mils) | Trace Separation (mils) | Notes |
---|---|---|---|---|
+3V3 | Power | 12-20 | N/A | Width for currents up to 500mA. For higher currents, increase width accordingly. |
GND | Power | Use Ground Plane | Use Ground Plane | A solid ground plane is recommended for better EMC performance and signal integrity. |
VBAT, VSOLAR | Power | 12-20 | N/A | Adjust width for actual current carrying requirements. |
USB_DP, USB_DM | High-speed USB | 5-6 | 5-10 | Maintain 90Ω differential impedance. Shield with ground traces or planes. |
SD_DATA0, SD_DATA1, | High-speed Data | 5 | 5 | High-speed data lines; keep short and matched in length. |
SD_DATA2, SD_DATA3, | ||||
SD_CLK, SD_CMD | ||||
QSPI_SD0, QSPI_SD1, | High-speed Data | 5 | 5 | Match length for QSPI lines. Consider controlled impedance if operating at high speeds. |
QSPI_SD2, QSPI_SD3, | ||||
QSPI_SCLK, QSPI_SS | ||||
I2C Lines (MIC_SDA, | I2C Bus | 8-10 | 10-15 | Lower speed. Increase separation to reduce crosstalk with adjacent signals. |
MIC_SCL) | ||||
LORA_RX, LORA_TX, | RF | 6-8 | 15-20 | Shielding might be necessary depending on frequency & sensitivity. |
LORA_NRST | ||||
Analog Signals (e.g., | Analog | 8 | 10-15 | Keep away from digital signals to minimize noise coupling. |
temperature, humidity) |
Table
Net Name | Description | Connected From (Output) | Connected To (Input) | Pass |
---|---|---|---|---|
17997d7a4c1dbed7624dfa9a985caa66 (3.3V) | Power Supply Net | U1 (VREG_VIN, ADC_AVDD), U3 (VOUT), U6 (VCC), ... | Various Components (+3.3V pins), U1 (IOVDD, USB_VDD), C1-C29 (Decoupling Capacitors) | ✔️ |
1ba3239e9266c6594b93a8fd775b52f8 (GND) | Ground Net | Various Ground Sources | Various Components (GND pins) | ✔️ |
b033ea28dad125eff97df123fd95f933 | SD Card Data 2 | J1 (SD Card Connector), R6 | U1 (GPIO21) | ✔️ |
25ff32cdb7ac5dfb028bb8bda5f49e3b | USB DP Connection | R2 | U1 (USB_DP pin) | ✔️ |
c1270ba3695dccf03a10bdd17d393aa1 | QSPI Clock | U2 (FLASH Clock), QSPI_SCLK | U1 (QSPI_SCLK) | ✔️ |
423bd0af28cfd635750c5da25ebe57d4 | Crystal Oscillator Circuit - Connection to XTAL_2 | Y1 (Crystal Oscillator), R18 | U1, C13 | ✔️ |
266238fd9c632d15f39b65d60972a6a8 | USB D- Connection | R1 | J3 (USB D-) | ✔️ |
fd22cfa0e33a243189da606a65c98da7 | SD Card Command Line | J1 | U1 (GPIO18) | ✔️ |
67216bee9c2dd91541e13ab2f35e17d9 | LoRa TX | U1 (GPIO1), U6 (PB7) | LORA_TX | ✔️ |
8e480312559054d07bea84743fca88fd | QSPI Data 1 | U2 (FLASH DO(IO1)), QSPI_SD1 | U1 (QSPI_SD1) | ✔️ |
b81d5e8efd7e57a024cbd6d9ca633fc3 | Microphone SCL | R14 | MK1 (BCLK) | ✔️ |
d6d34c9dd4345609c839f3d5867f3dfd | USB D+ Connection | R2 | J3 (USB D+) | ✔️ |
Table
Net Name | Members | Description | Pass |
---|---|---|---|
245a21cc6c029ded679132e2c1c0c385 | J1:7, SD_DATA0:P1, U1:GPIO19 | SD data line 0 connecting microSD card to RP2040. | ✓ |
17997d7a4c1dbed7624dfa9a985caa66 | Various to +3V3 pin | Powers various components via 3.3V power net. | ✓ |
1ba3239e9266c6594b93a8fd775b52f8 | Various to GND | Ground connections for multiple components. | ✓ |
b033ea28dad125eff97df123fd95f933 | SD_DATA2:P1, U1:GPIO21 | SD data line 2, connecting microSD card to RP2040. | ✓ |
25ff32cdb7ac5dfb028bb8bda5f49e3b | R2:P1, U1:USB_DP | USB D+ line, connecting USB D+ to a resistance, possible signal integrity issue without further context. | ⚬ |
c1270ba3695dccf03a10bdd17d393aa1 | QSPI_SCLK:P1, U2:CLK, U1:QSPI_SCLK | QSPI Serial Clock line, connecting Flash and RP2040. | ✓ |
423bd0af28cfd635750c5da25ebe57d4 | Y1, U6:GND, C12:P1 | Crystal to GND, unclear without Y1 connections specified to U1 (RP2040). | ⚬ |
43714025d6017d163b66c1c7ddfc4e7b | Various to +1V1 | 1.1V power net, assumes connection to components requiring 1.1V. | ⚬ |
7d79395261b47078d0e06939f7fc4fde | QSPI_SD2, U1:QSPI_SD2 | QSPI Data line 2, proper connectivity between Flash and RP2040. | ✓ |
6e63dc90d60aedee3aa7dd2bec8171c7 | U1:USB_DM, R1:P1 | USB D- line, exact function of R1 in this context is unclear without schematics. | ⚬ |
245fe6b384f27961ed316aa72e4be795 | ~USB_BOOT:P1, R4:P2 | Boot mode selection, assuming connection logic to RP2040 is correct. | ⚬ |
266238fd9c632d15f39b65d60972a6a8 | USB_D-, R1, J3:D- | USB D- connectivity, assuming proper resistance and USB connection. | ✓ |
fea8630909e6e44f3c184b86543592ff | SD_CLK:P1, U1:GPIO17, J1:5 | SD clock, linking SD card clock to RP2040, assuming correct operation mode. | ✓ |
b32c6662190b898b49741f87f206dbb4 | LORA_NRST:P1, U6:RST | LoRa Module reset, assuming proper reset mechanism. | ✓ |
d6d34c9dd4345609c839f3d5867f3dfd | USB_D+:P1, R2:P2, J3:D+ | USB D+ connectivity, the function of R2 in this context needs clarification. | ⚬ |
Table
Net ID | Connection Description | Connected Devices and Pins | Input/Output Compatibility | Pass |
---|---|---|---|---|
245a21cc6c029ded679132e2c1c0c385 | SD_DATA0 Net | J1:($7$), SD_DATA0:($P1$), U1:($GPIO19$) | Output to Input | ✅ |
17997d7a4c1dbed7624dfa9a985caa66 | +3V3 Power Supply Net | Various | Power Supply to Power Input | ✅ |
1ba3239e9266c6594b93a8fd775b52f8 | Common Ground Net | Various | Common Ground | ✅ |
b033ea28dad125eff97df123fd95f933 | SD_DATA2 Net | SD_DATA2:($P1$), U1:($GPIO21$), R6:($P1$) | Output to Input | ✅ |
25ff32cdb7ac5dfb028bb8bda5f49e3b | USB_D+ Data Line | U1:($USB_DP$), R2:($P1$) | Output to Input | ✅ |
cc9b14f0f08a0e83d6ebff475653d468 | Battery Voltage Supply | U5:($BAT$), U4:($EN$, $VIN$), VBAT:($P1$) | Power Supply to Power Input | ✅ |
423bd0af28cfd635750c5da25ebe57d4 | Crystal Oscillator Net | Y1, R18, C13 | Compatible | ✅ |
43714025d6017d163b66c1c7ddfc4e7b | +1V1 Power Supply Net | Various | Power Supply to Power Input | ✅ |
fd22cfa0e33a243189da606a65c98da7 | SD_CMD Net | J1:($3$), SD_CMD:($P1$), U1:($GPIO18$) | Output to Input | ✅ |
5297dbb49de6e2a8228562f5c9c283ca | RUN Pin Net | U1:($RUN$) | Correct pin usage | ✅ |
67316bee9c2dd91541e13ab2f35e17d9 | LoRa TX | LORA_TX:($P1$), U1:($GPIO1$), U6:($PB7$) | Output to Input | ✅ |
8a602b61928f653af971827d7ed60277 | Load Capacitor Net | C14, Y1 | Correct Component Connection | ✅ |
9fc37eacc12162c973b365519f880b24 | MIC Data Out Net | R12:($P2$), MK1:($DATA_OUT$) | Output to Input | ✅ |
365d283d5d764d68e6ce4c2357f5a57f | USB Interface Power | D4, R11, D5 | Output to Input/Indicator | ✅ |
2166bbe758002c7e6eb8c64682f5521c | RF Connection | J4:($SIGNAL$), U6:($RFIO$) | Output to Input | ✅ |
Table
Component Name | Net Name | Role | Connected To | Connection Description | Pass |
---|---|---|---|---|---|
RP2040 (U1) | GPIO0 | Digital Output | LoRa_RX (U6:PB6) | RP2040's GPIO0 to LoRa module's RX, logical for UART Comm. | ✅ |
RP2040 (U1) | GPIO1 | Digital Output | LoRa_TX (U6:PB7) | RP2040's GPIO1 to LoRa module's TX, suitable for UART Comm. | ✅ |
RP2040 (U1) | QSPI connections | Memory Interface | External Flash (U2: W25Q128JVSIQ) | RP2040's SPI to Flash memory, logical for data storage/access. | ✅ |
RP2040 (U1) | GPIO18, GPIO19, GPIO20, GPIO21, GPIO22 | SD Card Interface | SD Card (J1) | RP2040 to SD Card connections for data logging, suitable setup. | ✅ |
RP2040 (U1) | GPIO25 | Digital Output | User LED (D2) | Drives LED, indicating operational status. Correct usage of GPIO as output. | ✅ |
LoRa-E5 Module (U6) | PB6, PB7 | UART | RP2040 (GPIO0, GPIO1) | LoRa UART RX/TX to RP2040. Good for reciprocal UART comm. | ✅ |
External Flash (U2) | QSPI connections | Memory Interface | RP2040 (QSPI) | SPI Memory connected to RP2040's QSPI, valid for external memory. | ✅ |
Solar Power Interface | VSOLAR | Power Input | Q1 Disconnect, CN3063 (U5:VIN) | Solar input properly managed and also connected to charge IC VIN. | ✅ |
USB Interface | VUSB | Power Input | CN3063 (U5:VIN) | Power from USB directed to battery charger VIN, logical power flow. | ✅ |
I2C Bus Components | GPIO2, GPIO3 | I2C Interface | Sensors, EEPROMs, and other peripherals | Logical connection for I2C, but lacks specific peripheral connections. | ⚪ |
MEMS Microphone (MK1) | DATA_OUT | Digital Output | RP2040 (GPIO9) | Microphone output to GPIO for data acquisition. Technically suitable. | ✅ |
Battery Charger (U5) | BAT | Power Output | Power Circuit | Charger BAT pin powers system/Battery, correct for power management. | ✅ |
RT8059GJ5 (U4) | LX, FB, EN, VIN | Buck Converter | Components and Power Nets | EN tied to power, FB for voltage feedback, LX node setup correctly. | ✅ |
Table
Components Connected | Net Name | Pass | Notes |
---|---|---|---|
U1:$\text{(VREG_VIN)}, U1:\text{(ADC_AVDD)}$ | 17997d7a4c1dbed7624dfa9a985caa66 | ✓ | Input to input, but assumes internal U1 connection logic. |
Y1:$\text{(CASE_2)}, U6:\text{(GND)}$ | 1ba3239e9266c6594b93a8fd775b52f8 | ✓ | Ground connections are universal. |
SD_DATA2:$\text{(P1)}, U1:\text{(GPIO21)}$ | b033ea28dad125eff97df123fd95f933 | ✓ | Data line to GPIO is correct. |
R2:$\text{(P1)}, U1:\text{(USB_DP)}$ | 25ff32cdb7ac5dfb028bb8bda5f49e3b | ✓ | Assuming R2 limits current or voltage for USB DP line. |
QSPI_SCLK:$\text{(P1)}, U2:\text{(CLK)}$ | c1270ba3695dccf03a10bdd17d393aa1 | ✓ | Clock line correctly connected to clock input. |
VBAT:$\text{(P1)}, U4:\text{(VIN)}$ | cc9b14f0f08a0e83d6ebff475653d468 | ✓ | Power input to VIN is correct. |
Y1:$\text{(XTAL_2)}, R18:\text{(P1)}$ | 423bd0af28cfd635750c5da25ebe57d4 | ✓ | Assuming R18 is for crystal stabilization. |
U1:$\text{(GPIO8)}$ | 44111a40b9db91bbb52f0a8e51ec07a2 | Uncertain without context of GPIO8 usage. | |
DHT_DATA:$\text{(P1)}, U1:\text{(GPIO16)}$ | 26af10baf3a8d3386e113f38935efed2 | ✓ | Data line to GPIO is correct for DHT sensor data. |
LORA_NRST:$\text{(P1)}, U6:\text{(RST)}$ | b32c6662190b898b49741f87f206dbb4 | ✓ | Reset line to reset pin is correct. |
Q1:$\text{(D)}, VSOLAR:\text{(P1)}$ | 36691be5044d6503f1e968b9ee9ef421 | ✕ | A depletion MOSFET's drain should not connect directly to power without context. |
U1:$\text{(GPIO17)}, SD_CLK:\text{(P1)}$ | 40a05f88548186c46c37bd670a8319e8 | ✓ | Clock line to GPIO is correct for SD card operation. |
LORA_TX:$\text{(P1)}, U1:\text{(GPIO1)}$ | 67316bee9c2dd91541e13ab2f35e17d9 | ✓ | TX line to GPIO is logical for transmit function. |
U1:$\text{(USB_DM)}, U1:\text{(GPIO25)}$ | 6e63dc90d60aedee3aa7dd2bec8171c7, 062b5536c382dedef80519835492f6d5 | ✓ | USB Data- to GPIO/USB pin, standard connection. |
U5:$\text{(FB)}, U4:\text{(FB)}$ | fea8630909e6e44f3c184b86543592ff | ✕ | Feedback pin to feedback pin is incorrect without additional context or circuitry. |
Table
Net ID | Member 1 | Member 2 | Pass |
---|---|---|---|
245a21cc6c029ded679132e2c1c0c385 | J1:7 (SD_DATA0) | U1:GPIO19 (I/O) | ✅ |
17997d7a4c1dbed7624dfa9a985caa66 | U1:VREG_VIN (PowerIn) | $+3V3$ (PowerOut) | ✅ |
1ba3239e9266c6594b93a8fd775b52f8 | U6:GND (GND) | J5:2 (GPIO?) | ✅ |
b033ea28dad125eff97df123fd95f933 | SD_DATA2 (I/O) | U1:GPIO21 (I/O) | ✅ |
25ff32cdb7ac5dfb028bb8bda5f49e3b | R2:1 (GPIO?) | U1:USB_DP (I/O) | ✅ |
c1270ba3695dccf03a10bdd17d393aa1 | QSPI_SCLK (Output) | U1:QSPI_SCLK (Input) | ✅ |
cc9b14f0f08a0e83d6ebff475653d468 | U4:EN (Input) | VBAT (Output) | ✅ |
423bd0af28cfd635750c5da25ebe57d4 | Y1:XTAL_2 (Output?) | R18:1 (I/O?) | ✅ |
43714025d6017d163b66c1c7ddfc4e7b | $+1V1$ (PowerOut) | U1:VREG_VOUT (PowerIn) | ✅ |
7d79395261b47078d0e06939f7fc4fde | QSPI_SD2 (Output) | U1:QSPI_SD2 (Input) | ✅ |
6e63dc90d60aedee3aa7dd2bec8171c7 | U1:USB_DM (I/O) | R1:1 (GPIO?) | ✅ |
245fe6b384f27961ed316aa72e4be795 | ~USB_BOOT (Unknown) | R4:2 (Unknown) | ❌ |
266238fd9c632d15f39b65d60972a6a8 | USB_D- (Output) | R1:2 (Input) | ✅ |
fd22cfa0e33a243189da606a65c98da7 | J1:3 (SD_CMD) | U1:GPIO18 (I/O) | ✅ |
b75c82abd2185a294349d42b0e1f3cb1 | R9:1 (GPIO?) | SD_DATA1 (I/O) | ✅ |
26af10baf3a8d3386e113f38935efed2 | DHT_DATA (I/O) | R5:2 (GPIO?) | ✅ |
b32c6662190b898b49741f87f206dbb4 | LORA_NRST (Output) | U6:RST (Input) | ✅ |
fea8630909e6e44f3c184b86543592ff | C17:2 (Unknown) | U3:EN (Input) | ✅ |
5b2c4d286741e18ef46ec4dd36d4c597 | VUSB (PowerOut) | Q1:G (Input) | ✅ |
a97a65fdfad65c8223644e8ec97d56f8 | R11:1 (GPIO?) | U5:VIN (PowerIn) | ✅ |
925b0b875b246782a050522ecb89e981 | QSPI_SS (Output) | U1:QSPI_CSN (Input) | ✅ |
f6ff9e9c5f0c1345979ab9b806d133ad | R16:1 (GPIO) | MK1:BCLK (Input) | ✅ |
191ea8c381f4d078cc84482432175da7 | R17:1 (GPIO) | MK1:WS (Input) | ✅ |
638a2d6fababd22a4e44f4bf2b8d7547 | SD_DATA3 (I/O) | U1:GPIO22 (I/O) | ✅ |
36691be5044d6503f1e968b9ee9ef421 | Q1:D (Input) | VSOLAR (Output) | ✅ |
9fc37eacc12162c973b365519f880b24 | R12:2 (GPIO) | MK1:DATA_OUT (Output) | ✅ |
Table
Review Area | Assessment | Recommendations |
---|---|---|
Power Supply | Pass | Ensure each IC and power-consuming component is accompanied by an appropriate value and physical size of decoupling capacitors, e.g., 100nF for most digital ICs, placed as close to the power pins as possible. Your design with multiple decoupling capacitors (C1, C2, C3, etc.) seems in line with this practice. Check the solar and battery power supply schemes for proper power sequencing and isolation (Q1 as a disconnect switch is a good approach). |
Signal Integrity | Pass with considerations | Signal paths for high-speed interfaces (e.g., QSPI) should be checked for impedance matching. For the SD card interface and LoRa connectivity, ensure that trace lengths are minimized and matched as necessary. Termination resistors R1, R2 (for USB DP/DM) seem correctly placed to mitigate reflection; ensure similar considerations are made for other high-speed signals. |
Component Placement | Pass with considerations | Attention should be paid to placing the external flash close to the RP2040 (as noted for C11), ensuring short and direct routes for critical signals. Keep analog and digital sections distinct when possible, and consider thermal management for U5 (charge controller) and any other power-dissipating components. |
Grounding | Pass with considerations | Implement a solid ground plane or planes to ensure low impedance return paths. Avoid splitting or segmenting the ground plane unnecessarily to prevent ground loops. Ensure that sensitive analog grounds (if any) are properly separated from digital grounds and joined at a single point (star grounding). |
Connectivity | Pass | Your project seems to have well-identified connections between components (e.g., SD card interface lines directly tied to U1, GPIO connections for sensors and LEDs). Double-check for any missing connections or potentially unsupported configurations. |
Component Selection | Pass | Components seem appropriately selected for the application and operating environment. Specific attention to the MEMS microphone (MK1) and the LoRa module (U6) for their sensitivity and RF characteristics, respectively, is commendable. Ensure all components meet the board's operational temperature range and power requirements. |
Compliance | Pass with considerations | Ensure RoHS, and possibly REACH compliance for all components used. Your project's reliance on Creative Commons for some components indicates good practice in licensing compliance; extend this diligence to all proprietary and third-party elements. Documentation appears thorough but should continually be updated to reflect design iterations. |
NameX
and ValueX
placeholders with your specific criteria and values.NameX
, ValueX
) with your actual data points or criteria. Each -->
symbol represents a connection or relationship, and the text within square brackets $$ or parentheses $ $ represents nodes. Quadrants are usually used for analysis purposes, so consider what dimensions or metrics you would like each quadrant to represent.Plantuml
@startuml ' Define the timeframe Timing ' Define the clock signals clock rp2040Clk with period 10us clock qspiClk with period 5us clock sdClk with period 2us ' Named timepoints for demonstration @0ms @50ms ' Shorten the clock signal names for display concise rp2040Clk as "RP2040 Clk" concise qspiClk as "QSPI Clk" concise sdClk as "SD Clk" ' Clock signal narratives (optional) rp2040Clk is "External Crystal Oscillator" at 10ms qspiClk is "Flash Memory Communication" at 20ms sdClk is "SD Card Data Transfer" at 30ms @enduml
rp2040Clk
), the QSPI clock for communication with the external FLASH memory (qspiClk
), and the clock signal for the SD card data transfer (sdClk
).Table
Step | Action | Purpose | Observation/Action If Issue Persists |
---|---|---|---|
1 | Check USB Cable | Ensure the USB cable is not the issue. | Use a different USB cable known to work; confirm the cable supports data transfer, not just charging. |
2 | Inspect USB Port on Computer | Verify the computer's USB port is functioning. | Try a different USB port or a different computer to rule out a faulty USB port. |
3 | Visual Inspection of PCB | Look for any visible signs of damage or incorrect assembly around the USB interface. | Check solder joints of J3 (USB Connector) and surrounding components for cold solder or shorts. |
4 | Check PCB for Shorts | A short circuit can prevent the device from being recognized. | Use a multimeter to check for shorts on the USB data lines (D+ and D-), particularly between J3: D+ (pin 3), D- (pin 2), and respective components (R1, R2 on D- and USB_D+ net). |
5 | Verify Power Supply | Insufficient or unstable power can cause detection issues. | Ensure +3V3 (Pin 1) and GND (Pin 5) on J3 have correct voltage levels and stability, indicating the power circuit is properly working. |
6 | Check U1 (RP2040) Boot Mode | The RP2040 needs to be in USB boot mode to show up as mass storage. | Ensure the boot mode is correctly set. Holding down the BOOTSEL button (if implemented) while plugging in the USB may force it into the correct mode. If ~USB_BOOT (connected to GPIO25 on RP2040) is used to control boot mode electronically, verify its function. |
7 | Inspect USB Data Lines | Broken or poorly soldered data lines can prevent communication. | Check continuity of USB D+ and D- lines from J3 to U1 (RP2040), including through any termination or protection resistors (R1 for D-, R2 for D+). |
8 | Firmware Check | Incorrect or corrupted firmware can prevent proper functionality. | Use another verified working RP2040-based board to confirm the firmware's functionality. If possible, re-flash the firmware on your device. |
9 | Inspect External Flash Memory (U2) | The RP2040 relies on external flash (U2) for its firmware. | Ensure that U2 is correctly soldered with no shorts between pins and that the SPI communication lines (QSPI_SD0, QSPI_SD1, QSPI_SD2, QSPI_SD3, QSPI_SCLK, QSPI_SS) are not interrupted or shorted. |
10 | Check for Component Damage | Damaged components can cause functionality issues. | Specifically, inspect U2 (external FLASH), U1 (RP2040), and major power components (U3, U4) for signs of damage or overheating. Replace if necessary. |
Table
Step | Check | Action |
---|---|---|
1 | USB Connection | Confirm that the USB cable is properly connected to both the board and the computer. Try different USB ports on your computer. |
2 | Power Supply to the Board | Verify that the board is receiving power. Check the voltage at the power input and on board power lines (+3V3 and VUSB nets) to ensure they are within specification. |
3 | Board Initialization | Ensure that the board is properly initialized. A failure or hang during startup could prevent USB enumeration. |