VoltiX Pro 320 Diagnostic Station

flux

I’ll add a Teensy 4.1 socket representation and wire the named control/telemetry nets. First I’ll check whether Pi/Teensy header parts already exist in the schematic/library; if a full Teensy socket part isn’t available, I’ll use a 48-pin dual-row header/socket with explicit net labels for the Teensy functions.

flux

I’m blocked because the project ran out of execution credits during the library search, so I could not add or wire the Teensy socket.
Completed so far:
  • Inspected the schematic: no Raspberry Pi header or Teensy socket currently exists.
  • Searched the library for a Teensy 4.1 / 2x24 / 48-pin female socket: no exact usable part was found.
  • Found a usable Raspberry Pi 5 GPIO header candidate:
    • Pin Socket 02x20 for Rpi 5, 40 terminals, library UID 339d7494-1424-4871-b0a9-f2bc536ebf3e
  • Confirmed the fallback plan: use either two 1x24 female socket strips or a 2x24 48-pin socket if available, then label the Teensy 4.1 functions explicitly.
Still to do once credits are available:
  1. Add the Raspberry Pi 5 40-pin GPIO header.
  2. Add the Teensy 4.1 socket representation, likely as two 1x24 female headers if no exact 2x24 socket exists.
  3. Wire:
    • Teensy pin 1 TX1 -> Pi UART RX
    • Teensy pin 0 RX1 -> Pi UART TX
    • Teensy A0 / pin 14 -> shunt amplifier output net
    • Two Teensy PWM pins -> voltage adjust and current limit control nets
    • Teensy pins 11/12/13 -> SPI MOSI/MISO/SCK expansion nets
    • All Teensy/Pi/analog grounds -> common GND
  4. Run review and fix any ERC issues.
  5. Update the architecture/firmware notes with the final pin mapping.
Find socket headers
Add Pi header
Create pin map
Search 2x24 socket
Inspect existing nets
Sign up to send

Files

Schematic

Layout

Preview

Schematic Progress and Open Decisions
Completed Schematic Block
Added and wired the first SELV-side DC input block. This is the boundary between the separate isolated mains module and the main electronics PCB.

Table

DesignatorPartFunction
J1XY301V-A-5.0-2P15 A screw terminal input from isolated AC-DC module
F1Littelfuse 178.6164.0001Replaceable 15 A blade fuse holder for DC bus protection
D1SMBJ36ATVS clamp across protected 36 V bus
C1470 uF, 63 V generic capacitorBulk energy storage on protected bus
C21 uF, 100 V generic capacitorHigh-frequency bypass on protected bus
Nets Created

Table

NetPurposeMetadata
DCIN_RAW_36VPositive isolated DC before fusePower, 15 A max
36V_BUS_PROTECTEDProtected fused 36 V busPower, 15 A max
GNDIsolated DC return / SELV 0 VGround, 15 A max
Library Findings
  • No suitable 36 V, 350–400 W certified enclosed AC-DC module was found in the library. A missing-part request was submitted for a Mean Well LRS/UHP/RSP/HRP-style 36 V module.
  • No exact 36 V input, 30 V output, 10 A programmable synchronous buck controller was found in the library.
  • Suitable 36 V-to-5 V auxiliary buck candidates were found, especially TI LMR33630 family parts.
  • Suitable current-sense candidates were found: INA226 for digital telemetry and INA240A1 for fast analog current feedback.
Review Result
The current schematic is electrically connected for the input block. Project review reports:
  • Airwires: expected because PCB routing has not started.
  • Generic capacitor MPN warnings: expected at this concept stage until exact capacitor MPNs are selected.
Critical Open Design Decision
The next block depends on the programmable output strategy:
  1. Custom programmable buck stage
    • Pros: full control, product-like design, can implement precise CV/CC behavior.
    • Cons: high complexity, power-loop stability, thermal design, MOSFET/inductor selection, and safety testing required.
  2. Prebuilt programmable DC-DC module controlled by MCU
    • Pros: faster, lower risk for a hobbyist prototype, easier thermal validation.
    • Cons: less integrated, may not match the poster/product form factor exactly.
Recommended next step: choose option 2 for the first prototype, while keeping the architecture compatible with a later custom buck board.

  • Completed Schematic Block

  • Nets Created

  • Library Findings

  • Review Result

  • Critical Open Design Decision