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Routing Completion
Final release verification update
The later U6/L2 power-stage work did not disturb the completed FPGA routes. Fresh live checks on 24 September 2026 report 0 airwires, 0 redundant traces, and no open/error/warning findings for overlapping copper/traces, dangling copper, invalid layers, keepouts, component overlap, stackup validation, pad-access clearance, or switching-power-stage checks. The repaired U6 VIN-to-SW clearance is 0.100 mm against a 0.0889 mm minimum. All passive MPN assignments are complete with 0 missing-MPN findings.
Verified result (24 September 2026)
  • The FPGA_DONE and FPGA_PROGRAMN U1 BGA balls are electrically routed to their existing branches. Board routing state: 0 airwires, 0 redundant traces.
  • Live Design Rule Checks: 0 errors, one pre-existing VCCAUX_F15 component-override warning. No overlapping-copper or via-in-pad findings reported. FPGA_JTAG_TMS was temporarily displaced during DONE clearance and then reconnected before the final check.
  • All existing component placement and the eight-layer stackup remained unchanged.
Final local geometry
  • U1:PROGRAMN pad center (-11.000,-6.800) mm: through-via-in-pad, per-via copper pad 0.45 mm, drill 0.20 mm, followed by a 0.10 mm Mid-Layer 5 eastward stub to (-9.700,-6.800) mm. The router completed the remainder to the original PROGRAMN branch, using three further vias.
  • U1:DONE pad center (-11.000,-7.600) mm: 0.10 mm Top copper south to a separate through-via at (-11.000,-8.900) mm. Through-via at the pad center was deliberately avoided because MUX_5V_OUT runs beneath it on Mid-Layer 5. The DONE via has a per-via 0.45 mm pad / 0.20 mm drill override.
  • The DONE Mid-Layer 5 escape runs via (-10.800,-8.900), (-10.800,-9.900), (-9.400,-9.900) to (-6.500,-9.900) mm, where a second 0.45/0.20 mm via transitions out of the BGA fanout. The router completed the remaining connection to the existing DONE via branch, using four further vias.
  • The obstructing FPGA_JTAG_TMS via at (-10.860,-9.200) mm was removed, a conflicting old TMS trace was removed, and the TMS connection rerouted with one replacement via (reported near (-11.560,-10.850) mm). Final board routing confirms TMS continuity.
Release gate
Do not fabricate before the fabricator approves the three new 0.45 mm pad / 0.20 mm drilled through-vias, including the resin-filled, planarized, copper-capped IPC-4761 Type VII construction for PROGRAMN via-in-pad, annular-ring and registration capabilities, and the finished drill specification. The stackup's default via definition remains 0.60/0.30 mm; these three local overrides need explicit review against the manufacturing quote. Re-run full DRC and regenerate fabrication data only after that approval. See Fabrication Notes.

  • Final release verification update

  • Verified result (24 September 2026)

  • Final local geometry

  • Release gate