Pixhawk V6X Board Discussion

flux

현재 BOM 기준으로 IC / 반도체류만 추리면 아래와 같습니다.
커넥터, 일반 R/C, 핀헤더는 제외했습니다.

Table

구분Designator부품명MPN제조사수량용도
Power MUX ICU3TPS2121RUXRTPS2121RUXRTexas Instruments / TI1POWER1/POWER2 5V 입력 자동 선택용 power mux
CAN Transceiver ICU1, U2TJA1051TK_3,118TJA1051TK/3,118NXP2CAN1/CAN2 MCU-side TX/RX ↔ CANH/CANL 변환
MOSFETQ1AO3400AO3400YFW1Buzzer 구동용 N-channel MOSFET
USB ESD/TVS ArrayD1USBLC6-2SC6USBLC6-2SC6STMicroelectronics1USB D+/D− ESD 보호
USB ESD/TVS ArrayD4USBLC6-4SC6USBLC6-4SC6Texas Instruments Inc. / ST 계열 데이터시트 사용1USB/IO ESD 보호
CAN ESD ProtectionD2, D3PESD2CAN,215PESD2CAN,215Nexperia2CANH/CANL ESD 보호
Power TVSD8, D9SMAJ5.0ASMAJ5.0ASHIKUES2POWER1/POWER2 입력 TVS 보호
Signal / Flyback DiodeD51N4148WS-7-F1N4148WS-7-FDiodes Incorporated1Buzzer/신호 보호용 다이오드
요약하면, 현재 BOM의 IC/반도체류는 8개 그룹, 총 11개 부품 인스턴스입니다.
  • U3: 1개
  • U1/U2: 2개
  • Q1: 1개
  • D1/D4: 2개
  • D2/D3: 2개
  • D8/D9: 2개
  • D5: 1개
P

pothme

왜 해당 칩을 선정했는지, 어디 가이드문서가 있었는지 확인

flux

각 IC/반도체류별로 선정 이유와 근거 문서가 실제로 어디에 기록되어 있는지 확인하겠습니다. 회로도/BOM/프로젝트 파일/데이터시트 기준으로 구분해서, 문서 근거가 없는 것은 ‘설계자 판단’으로 명확히 표시하겠습니다.
Worked for 1 min 5 sec
Thought for 8 sec
Reading the BOM for Integrated Circuit, USB, MOSFETs, ESD and Surge Protection, Diode.
Thought for a moment
Creating project documentation
I need to finalize some details and possibly create a document. The tool for filtering the BOM failed, and I had a previous list to refer to. I might consider using the full BOM without filters since it's already in context. I'll create or update a project document with the rationale for IC selection, making sure to keep it concise. It seems like I should focus only on IC and semiconductors while updating the docs.
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Schematic

Layout

3D View

Overlapping Copper Pre-Routing Report
Date: 2026-05-19 Scope: Copper overlap DRC items only. No routing performed. USB placement was not changed during this investigation.
Current DRC Summary
Focused review: design_rule_check_overlapping_copper
Result: 8 overlapping-copper errors, grouped into two repeated component-level issues:
  • 4 checks on U1 / internal element UID d07ee657-77c1-4c1e-b1f8-e1a179c8f4fa
  • 4 checks on U2 / internal element UID e3c02cf9-7cac-429c-9723-61113e4c6985
The repeated checks correspond to four internal footprint mount copper features overlapping the same exposed pad on each CAN transceiver footprint.
Issue Table

Table

Issue groupAffected component / footprintLayerOverlap typeLikely causeRecommended fix
1U1, TJA1051TK/3 CAN transceiver, footprint for TJA1051TK_3,118, located near (-40 mm, 35 mm)Top copper / component sideInternal footprint mount pads overlap exposed pad EPADFootprint geometry issue, not placement. The DRC pairs each of four unnamed defaultFootprint.mounts.* pads against U1:EPAD.Replace or edit the TJA1051 footprint so mechanical/mount pads do not create separate overlapping copper on top of EPAD. Preferred: use a clean HVSON/VSON-8 CAN transceiver footprint where the exposed thermal pad is one GND copper pad and package/mount primitives are non-copper or excluded from DRC. If those four mount pads are intentional same-net copper, merge/assign them to the exposed GND pad geometry rather than leaving them as separate overlapping pads.
2U2, TJA1051TK/3 CAN transceiver, footprint for TJA1051TK_3,118, located near (-40 mm, 24 mm)Top copper / component sideInternal footprint mount pads overlap exposed pad EPADSame footprint geometry issue as U1; same part and footprint reused. Not caused by U1/U2 proximity.Apply the same footprint correction/replacement to U2. Do not move U2 to fix this; placement is not the root cause.
Evidence
DRC item pattern
The overlapping-copper review reports these pairs:
  • U1 internal UID d07ee657...
    • defaultFootprint.mounts.06303... overlapping EPAD
    • defaultFootprint.mounts.453f... overlapping EPAD
    • defaultFootprint.mounts.60ba... overlapping EPAD
    • defaultFootprint.mounts.eb9c... overlapping EPAD
  • U2 internal UID e3c02cf9...
    • same four defaultFootprint.mounts.* patterns overlapping EPAD
Component mapping
The internal DRC IDs map to:
  • d07ee657-77c1-4c1e-b1f8-e1a179c8f4fa -> U1, TJA1051TK/3 CAN transceiver
  • e3c02cf9-7cac-429c-9723-61113e4c6985 -> U2, TJA1051TK/3 CAN transceiver
The layout index confirms both are top-side components:
  • U1: center approximately (-40 mm, 35 mm), top layer
  • U2: center approximately (-40 mm, 24 mm), top layer
The schematic confirms both EPAD and GND are on the GND net, so this is most likely same-net/footprint-internal copper overlap. The DRC still flags it because the footprint contains separate overlapping copper primitives.
Root Cause Classification
  • Not caused by USB placement.
  • Not caused by board outline or stackup.
  • Not caused by copper pours; routing has not started.
  • Not caused by U1 and U2 overlapping each other; they are separated by about 11 mm center-to-center.
  • Root cause: footprint geometry for TJA1051TK_3,118 has copper mount primitives overlapping the exposed pad.
Exact Fix Recommendation Before Routing
  1. Replace the TJA1051TK_3,118 footprint used by U1 and U2 with a clean manufacturer/library footprint for the correct TJA1051TK package.
  2. Ensure the exposed thermal pad is represented as a single GND copper pad.
  3. Ensure any package anchor/mounting geometry is not copper, or if copper is required, it is merged into the same EPAD copper pad instead of being separate overlapping pad objects.
  4. Re-run design_rule_check_overlapping_copper after the footprint correction.
  5. Only after overlap DRC is clean, proceed to routing.
Routing Gate
Do not start full-board routing until these U1 and U2 footprint-overlap errors are resolved or explicitly waived as intentional same-net footprint geometry.

  • Current DRC Summary

  • Issue Table

  • Evidence

  • DRC item pattern

  • Component mapping

  • Root Cause Classification

  • Exact Fix Recommendation Before Routing

  • Routing Gate