Attachment Review
see the mechanical specification and pin config
Image
Thought for 10 sec
Yes — I see it: the SKA60 uses a non-uniform 8-pin bottom-view pattern, not a simple 5.08mm grid. I’ll check the current U1 footprint against those coordinates and record/fix the footprint risk.
Worked for 5 mins 40 sec
Updated U1 to match the attached SKA60 mechanical spec: the footprint now uses the non-uniform bottom-view 8-pin pattern and 1.3mm drilled / 2.2mm pads for the 1.0mm pins.
Open items:
- The published custom part may still need the same footprint correction; I applied overrides in this project layout.
- DRC still reports airwires because routing has not been done yet.
Documented here: PCB Layout Notes.
Fix part, route, review
Fix custom part
Route the board
Run full DRC
Explain pin pattern
Refine this doc
Ask about this doc
Board Bring-Up Plan — 24V/12V Wall Power Distribution Board
Prerequisites
- Equipment: current-limited bench supply, multimeter, oscilloscope, dummy loads/electronic load, thermocouple or thermal camera, fire-safe test setup.
- Input source for first power: bench supply set to nominal 24V, initially current-limited.
- No firmware or programming equipment required.
- Safety notes: this board can deliver high current. Do not leave powered unattended during bring-up. Short-circuit and overload tests are potentially destructive.
1. Visual Inspection
- Verify J1/J2/J3/J4/J5 connector orientation and polarity markings.
- Confirm F1 fuse holder is populated with the intended 4A slow-blow 5x20mm fuse.
- Check U1 SKA60B-12 orientation and pinout before power.
- Confirm electrolytic C2 polarity across 12V and GND.
- Confirm D1/D2 LED orientation: anode side through R1/R2, cathode to GND.
- Inspect all through-hole power joints for solder fill and bridges.
- Verify MH1-MH4 are clear non-copper mounting holes.
2. Power Rail Verification
Table
| Rail | Source | Expected Voltage | Tolerance | Measure At | Initial Current Limit | Pass Criteria |
|---|---|---|---|---|---|---|
| 24V_IN_RAW | J1 P1 before F1 | 24V | Supply setting | J1 P1 to GND | 100-300mA no-load | No short, no heating |
| 24V_FUSED | F1 output | 24V | Supply setting minus fuse drop | F1 P2 or U1 +Vin to GND | 100-300mA no-load | Matches input within small fuse/drop loss |
| 24V_OUT | F2 output to J2 | 24V | Supply setting minus PTC drop | J2 P1 to J2 P2 | 100-300mA no-load | Present with no load, no heating |
| 12V | U1 +Vout | 12V | U1 datasheet tolerance | U1 +Vout, C2 P1, or C3 P1 to GND | 100-300mA no-load, then increase | Stable 12V, LEDs behave correctly |
| 12V_OUT1 | F3 output to J3 | 12V | 12V minus PTC drop | J3 P1 to J3 P2 | Load branch separately | Stable under intended load |
| 12V_OUT2 | F4 output to J4 | 12V | 12V minus PTC drop | J4 P1 to J4 P2 | Load branch separately | Stable under intended load |
| 12V_OUT3 | F5 output to J5 | 12V | 12V minus PTC drop | J5 P1 to J5 P2 | Load branch separately | Stable under intended load |
Procedure:
- With power off, measure resistance from 24V_IN_RAW, 24V_FUSED, 24V_OUT, 12V, 12V_OUT1, 12V_OUT2, and 12V_OUT3 to GND. Investigate any near-short.
- Apply 24V with no external loads and a 100-300mA current limit.
- Verify 24V_FUSED and 24V_OUT are present.
- Verify U1 starts and produces 12V.
- Increase current limit only after confirming no abnormal heating or overcurrent.
- Check ripple on the 12V rail if an oscilloscope is available.
3. Critical Signal Verification
Table
| Signal | Net Name | Expected State | Measure At | Notes |
|---|---|---|---|---|
| Remote control | U1 R.C | No connect | U1 pin 1 | Intentionally unused |
| Trim | U1 TRIM | No connect | U1 pin 8 | Intentionally unused |
| Positive remote sense | 12V | Tied to +Vout | U1 +R.S / +Vout | Local sense tie at module output |
| Negative remote sense | GND | Tied to -Vout | U1 -R.S / -Vout | Local sense tie at module output |
4. Connector and Interface Tests
Table
| Connector | Type | Pins to Verify | Test Method |
|---|---|---|---|
| J1 | Phoenix 1803277 2-pin | P1 = +24V input, P2 = GND | Continuity to F1 P1 and GND |
| J2 | Phoenix 1803277 2-pin | P1 = 24V_OUT, P2 = GND | Measure voltage after F2 |
| J3 | Phoenix 1803277 2-pin | P1 = 12V_OUT1, P2 = GND | Measure voltage after F3 |
| J4 | Phoenix 1803277 2-pin | P1 = 12V_OUT2, P2 = GND | Measure voltage after F4 |
| J5 | Phoenix 1803277 2-pin | P1 = 12V_OUT3, P2 = GND | Measure voltage after F5 |
5. Programming and Debug Interface
No programmable ICs are present.
6. Functional Validation
Table
| Test | Components Involved | Input | Expected Output | Pass Criteria |
|---|---|---|---|---|
| 24V indicator | R1, D1 | 24V_FUSED present | D1 green on | Visible indicator, R1 not overheating |
| 12V indicator | R2, D2 | 12V present | D2 green on | Visible indicator, R2 not overheating |
| 24V branch load | F2, J2 | Controlled load on J2 | 24V_OUT holds load | Voltage drop and temperature acceptable |
| 12V branch 1 load | F3, J3 | Controlled load on J3 | 12V_OUT1 holds load | Voltage drop and temperature acceptable |
| 12V branch 2 load | F4, J4 | Controlled load on J4 | 12V_OUT2 holds load | Voltage drop and temperature acceptable |
| 12V branch 3 load | F5, J5 | Controlled load on J5 | 12V_OUT3 holds load | Voltage drop and temperature acceptable |
| Combined load | U1, F1-F5, J1-J5 | Representative system load | All rails remain in tolerance | No nuisance fuse/PTC trip, no excessive temperature |
Procedure:
- Test each output branch individually before combined loading.
- Increase branch load gradually: 10%, 25%, 50%, 75%, then intended maximum.
- Measure output voltage at the connector, voltage drop across the PTC, PTC temperature, connector temperature, and U1 case temperature.
- Perform combined-load test only after individual branches pass.
- Repeat thermal validation in the intended enclosure/orientation at elevated ambient if possible.
7. Fault and Thermal Validation
- Do not assume PTCs are precision current limiters; they are slow thermal devices.
- PTC hold currents are specified near room temperature and must be derated for 60°C ambient.
- Validate which protection element trips first for each branch fault: source current limit, F1, U1 protection, or branch PTC.
- Short-circuit tests should use a current-limited source, thermal monitoring, and fire-safe setup.
- Record trip time, peak/limited current, post-trip voltage, reset time, and maximum component temperatures.
- Confirm the 4A input fuse supports the actual combined load budget over the full 18-36V U1 input range.
8. Expected Measurements Reference
Table
| Measurement | Location | Expected Value | Instrument |
|---|---|---|---|
| No-load input current | Bench supply feeding J1 | SKA60 no-load current plus LED current | Bench supply readout |
| 24V indicator current | R1/D1 branch | About 10mA nominal | DMM/current estimate |
| 12V indicator current | R2/D2 branch | About 10mA nominal | DMM/current estimate |
| 12V output capacitance | C2 + C3 | 101uF nominal local external capacitance | BOM/schematic |
| U1 output | U1 +Vout to GND | 12V nominal | DMM/scope |
| F1 temperature | Fuse/fuse holder | Must stay within fuseholder/fuse derating limits | Thermal camera/thermocouple |
| F2-F5 temperature | PTC bodies | Must stay within datasheet derating limits | Thermal camera/thermocouple |
| Connector temperature | J1-J5 | No excessive rise at load | Thermal camera/thermocouple |
Pass/Fail Summary
Table
| Test Section | Result | Notes |
|---|---|---|
| Visual Inspection | [ ] Pass / [ ] Fail | |
| Power Rails | [ ] Pass / [ ] Fail | |
| Critical Signals | [ ] Pass / [ ] Fail | |
| Connectors | [ ] Pass / [ ] Fail | |
| Functional Validation | [ ] Pass / [ ] Fail | |
| Fault/Thermal Validation | [ ] Pass / [ ] Fail |
Board Status: [ ] Ready for deployment / [ ] Requires rework
Prerequisites
1. Visual Inspection
2. Power Rail Verification
3. Critical Signal Verification
4. Connector and Interface Tests
5. Programming and Debug Interface
6. Functional Validation
7. Fault and Thermal Validation
8. Expected Measurements Reference
Pass/Fail Summary
