Hardware Design Process


I’ll prioritize a datasheet-backed component sourcing record, then create the PCIe Gen4 channel, stackup, placement, and routing guideline document. I’ll reconcile both against the existing specification before resuming schematic capture.
I resumed the existing executor with the requested priority order:
  1. Datasheet-backed Component Sourcing Record
  2. PCIe Gen4 Routing Guidelines
  3. Reconciliation against the existing specification and power budget
The executor completed, but I could not inspect or verify its output because the account ran out of available ACUs immediately afterward. The schematic remains unverified and should not resume until those files and sourced parts are reviewed.
Received notification from "PCIe Gen4 Bifurcation Board" that it finished — picking the work back up.
The executor reported completion, but I cannot inspect or reconcile its newly created documents because no ACUs are currently available. No verified schematic progress can be claimed; the last confirmed project state was 0 components and 0 nets.
Once ACUs are available, the immediate sequence is:
  1. Verify the Component Sourcing Record and all datasheet evidence.
  2. Verify the PCIe Gen4 Routing Guidelines, including topology, impedance, skew, loss budget, vias, REFCLK, and redriver criteria.
  3. Reconcile both against the existing Project Specification and Power Budget.
  4. Resume schematic capture and ERC verification.
Identify remaining work
Review design documents
Start schematic capture
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