Project Startup

flux

I’ll build the complete schematic in functional blocks, then run connectivity and electrical-consistency checks. Unknown motor current and GPS breakout voltage will remain explicit verification items.
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CubeSat ADCS Schematic
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flux

Created the ESP32 CubeSat ADCS Test Platform project name and description, and started the complete schematic build.
Open items:
  • The build could not be completed or verified because no ACUs are currently available.
  • Controller, sensors, GPS, power rails, motor drivers, potentiometers, DIP inputs, and ERC review remain unconfirmed.
  • No PCB layout was started.
Once ACUs are available, resume the schematic build and complete the electrical-consistency/ERC checks.
Received notification from "CubeSat ADCS Schematic" that it finished — picking the work back up.

flux

The executor reports the CubeSat ADCS schematic build completed, but I cannot inspect or independently verify its changes because no ACUs are currently available.
Remaining work:
  • Reconcile the schematic against the full requirements.
  • Run ERC/connectivity checks and resolve violations.
  • Confirm motor stall current is within the DRV8838 limits.
  • Confirm the GPS module supply and logic-voltage requirements.
  • Review pin assignments, power rails, and all three motor channels before starting PCB layout.
Review completed schematic
Check electrical issues
Verify motors and GPS
Prepare layout readiness

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Files

Schematic

Layout

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Project Specification
Project Overview
  • Status: Review
  • Tabletop CubeSat ADCS test platform controlled by an ESP32-DevKitC (ESP32-WROOM-32 class, 38-pin).
  • Scope is a complete professional electrical schematic only; PCB layout is excluded.
Intended Use
  • Laboratory/tabletop ADCS algorithm and fault-injection prototype.
  • Not flight hardware and not a certified mains product.
What the Device Should Do
  • Read LSM303AGR and MPU-6050 inertial sensors over one 3.3 V I2C bus.
  • Receive GPS data over UART2 and provide Bluetooth telemetry using the ESP32 internal radio.
  • Independently command three bidirectional 3 V brushed DC gear motors using PWM plus direction.
  • Read three manual analog potentiometers and eight active-low fault switches.
Main Features
  • ESP32 controller with fixed GPIO map.
  • LSM303AGR at 0x19 accelerometer / 0x1E magnetometer.
  • MPU-6050 with AD0 high at 0x69.
  • Exactly one shared 4.7 kΩ I2C pull-up pair.
  • External NEO-6M/GPS 6MV2 connector with GPS_VCC marked TBD 3.3/5 V and 3.3 V-only logic requirement.
  • Three protected DRV8838 PH/EN H-bridges, one per motor.
  • Eight non-destructive active-low software fault inputs.
System Architecture
Text
AC mains -> external DZ30LE-32C10 RCBO/fuse-breaker -> external isolated JC-24-12 PSU -> 12 V / 2 A
  -> low-voltage protection -> +12V_PROTECTED
     -> 3.3 V buck -> ESP32 + sensors + GPS
     -> 3.0 V buck -> three motor H-bridges -> motors
ESP32 <-> I2C sensors; ESP32 <-> GPS UART; ESP32 -> motor PWM/DIR; pots/DIP -> ESP32 inputs
Hardware Subsystems
  • Mains / isolated PSU: External devices represented only by interface connectors because exact JC-24-12 terminal pinout is unverified.
  • 12 V entry: PTC, reverse-polarity ideal-diode controller stage, TVS, ceramic and bulk filtering.
  • Regulators: Two LMR33630BDDAR synchronous bucks at 400 kHz.
  • Controller: ESP32-DevKitC 38-pin compatible development-board symbol.
  • Sensors: Bare LSM303AGR and datasheet-derived schematic-only MPU-6050 symbol.
  • Motor drive: Three DRV8838 single H-bridges with default-low nSLEEP bias.
Interfaces and Connections
  • I2C SDA GPIO21, SCL GPIO22.
  • GPS UART2: GPIO16 RX from GPS_TX; GPIO17 TX to GPS_RX.
  • Motors: M1 GPIO25/26; M2 GPIO27/14; M3 GPIO13/4 (PWM/DIR).
  • Pots: GPIO34, GPIO35, GPIO32.
  • DIP: GPIO5, 18, 19, 23, 33, 36/VP, 39/VN, 15.
Power and Runtime Expectations
  • Source: isolated 12 VDC, 2 A nominal.
  • No runtime target; mains-powered tabletop use.
  • Source adequacy is TBD until all three motor stall currents are measured.
Power Tree and Power Budget

Table

RailLoadsDesign basis
+3V3ESP32, sensors, logic, GPSLMR33630 3 A capability; intended margin above 1 A target
+3V0_MOTOR3 motors through DRV8838Converter 3 A capability, but adequacy TBD vs combined stall current
+12V_PROTECTEDBoth bucksLimited by external 12 V / 2 A supply and protection
Motor rail and source current cannot be finalized without measured motor stall current. GPS current and supply compatibility also remain breakout-dependent.
Manufacturing and Assembly Expectations
  • Professional schematic with real library parts and datasheet-backed support networks.
  • Schematic-only custom MPU-6050 part has no PCB footprint because PCB layout is out of scope.
  • Mains assembly and wiring require qualified review and enclosure/protection design.
Firmware-Relevant Hardware Requirements
  • Fault inputs are active-low and externally pulled high.
  • GPIO5 and GPIO15 switches must remain open/HIGH during reset unless boot behavior is verified.
  • Motor outputs must stay disabled until firmware intentionally drives each nSLEEP high.
  • ADC calibration/attenuation is required for the 0–3.3 V potentiometer range.
Physical Design Expectations
  • Functional blocks arranged left-to-right with external interfaces at edges.
  • SENSOR_GND and MOTOR_GND are separate return domains joined once at the protected-entry star point.
Important Design Decisions
  • DRV8838 selected because its PH/EN interface directly matches fixed DIR/PWM GPIOs.
  • LMR33630BDDAR selected for both rails to avoid 12-to-3.x V LDO dissipation.
  • GPS supply is explicitly selectable/TBD; GPS logic must remain 3.3 V compatible.
  • Fault injection is software-only; no DIP switch directly interrupts power or motor wiring.
Assumptions
  • ESP32-DEVKITC-32UE 38-terminal library symbol is pin-compatible for the requested ESP32-WROOM-32 DevKitC interface; module antenna suffix must be verified before procurement.
  • External DZ30LE-32C10 and JC-24-12 blocks are off-board and exact terminal markings remain TBD.
  • Motor nominal and stall currents are unknown.
Change Notes
  • Initial schematic architecture and component selections defined from the user brief.

  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Change Notes