I inspected the current layout and BOM. The project contains 33 placed schematic components (20 unique part types), but the PCB is still the default 160 × 100 mm, 4-layer rectangle; it has not yet been converted to the approved 60 mm circular 6-layer board or physically placed.
I could not perform the board resize, placement, or generate a downloadable BOM because there are currently no available ACUs.
Current part list
RK3566 SoC — U1
RK809-5 PMIC — U2
Micron MT41K256M16TW-107 DDR3L — U3
Samsung KLM8G1GETF-B041 8 GB eMMC — U4
USB4215-03-A USB-C receptacle — J1
MP5036AGJ-Z input eFuse — U5
USBLC6-2SC6 USB ESD protection — D1
INMP441 I²S microphone — M1
MAX98357A Class-D amplifier — U6
JST B2B-PH-K-S 2-pin speaker connector — J2
74AHCT1G125 WS2812 level shifter — U7
U.FL-R-SMT-1 antenna connector — J3
1×8 display header — J4
1×3 LED-ring header — J5
DPDT privacy switch — SW1
Four TS04 tactile switches — S1–S4
Keystone 3000 RTC coin-cell holder — BT1
ABS06 32.768 kHz RTC crystal — X1
Eight generic capacitors — C1–C8
Four generic resistors — R1–R4
Remaining work
Resize to the approved 60 mm circular, 6-layer board.
Place all 33 parts with connector access, RF clearance, and power/DDR considerations.
Produce the finalized BOM with values, footprints, and manufacturer ordering fields.
Review time: 2026-08-27 03:46 UTC Scope: post-wiring schematic-only review; no schematic or PCB mutations made.
Fresh ERC result counts
Table
ERC class
Result
Floating pins
791 errors
Missing power inputs
49 errors
Single-pin nets
3 errors
Driver conflicts
0 findings
Power-pin conflicts
0 findings
Pin-to-pin conflicts
0 findings
Shorted components/nets
0 findings
Undriven nets / unconnected wire endpoints
0 findings
ERC warnings
0 findings
The 49 missing-power errors are 30 RK3566 supply balls, 18 DDR3L VDD/VDDQ balls, and eMMC U4:VDDI. They are not safe to silence with no-connect markers.
Power and subsystem net evidence
USB-C / eFuse / ESD: VBUS_5V is confined to J1 VBUS, U5 VIN, input capacitor C1, EN pull-up R3, and D1 VBUS. SYS_5V begins at U5 SOURCE and supplies its output capacitor and downstream 5 V loads. USB D+/D− are split at D1 between connector and SoC, and CC1/CC2 each have a 5.1 kΩ Rd to GND. No conflicting supply drivers or VBUS-to-SYS_5V short was found.
eMMC: U4 VCCQ balls are on VDD_1V8 and U4 VCC/VDDF balls are on VDD_3V3; all listed VSS balls are on GND. This is consistent with the selected eMMC's 1.70–1.95 V VCCQ and 2.7–3.6 V VCC ranges. U4:VDDI (C2) is not connected. The datasheet describes it as an internal regulator stabilization node, not a supply rail; do not tie it to a voltage rail. Its required bypass network must be established from an authoritative eMMC reference/design rule before remediation.
Audio: MAX98357A VDD pins are on SYS_5V with 10 µF and 100 nF bypass capacitors; all GND/EP pins are on GND; OUTP/OUTN go only to the BTL speaker connector. I²S amplifier signals are individually connected SoC-to-amplifier. No speaker/power conflict found.
Microphone privacy: M1 VDD is on VDD_3V3 with C6=100 nF to GND and SD has the specified 100 kΩ pulldown. However, the current M1 symbol exposes only six pins and omits the real INMP441 CHIPEN and additional ground pins. Datasheet review identifies CHIPEN as pin 8 and specifies low = microphone disabled/power-down. Therefore the required hardware privacy mute is not complete and cannot be truthfully verified with this symbol.
RTC: Battery positive is isolated on RTC_BAT; the crystal and its two 22 pF capacitors are connected to RK809 XIN/XOUT. RK809 VCC_RTC is still floating, so the backup path is incomplete; no battery-to-main-rail short is present.
LED / controls / RF: SYS_5V supplies the LED header and AHCT buffer. The buffer input LED_PWM_SOC is not connected to a SoC GPIO. S1 PWRON is wired to GND and RK809 PWRON; volume buttons are grounded but await SoC GPIO assignments. The U.FL center conductor is a one-pin WLAN_BT_ANT net with no RF transceiver/module connection.
Categorization and required disposition
Real errors needing a change
U4 VDDI unconnected — real missing-power/stabilization-node error. Add only the manufacturer-supported bypass implementation; it must not be connected directly to VDD_1V8 or VDD_3V3.
U6 AMP_SD_MODE single-pin net — requires a deliberate, datasheet-supported fixed mode or SoC control connection.
MP5036A ILIMIT is unconnected — not emitted by ERC, but it conflicts with the stated 3 A input-path requirement. Floating ILIMIT selects the device's fixed 2.5 A limit; a roughly 730 Ω resistor from ILIMIT to GND programs approximately 3 A. This is a requirement failure rather than a detected power conflict; no edit was made.
Intentional no-connects
No-connect markers are present (eight total) for intentionally unused pins. The review produced no separate ERC no-connect misuse finding.
eMMC pins named NC/RFU should remain unconnected per the part definition; they are not remediation targets.
Missing component/symbol pin
M1 INMP441: CHIPEN and two ground pins are absent from the current symbol although the device pinout includes them. This blocks completion and verification of the hardware microphone privacy mute. Correct/replace the symbol before adding the control circuit.
Architecture blocks that cannot safely be completed yet
RK3566/RK809/DDR3L: the 30 SoC and 18 DDR3L missing-power errors plus the large floating-pin set arise from the intentionally incomplete BGA/PMIC/memory architecture. Do not invent rail sequencing, DDR3L wiring, or decoupling until the complete Rockchip reference design and rail plan are resolved.
Display J4: all eight header pins are floating; it is a provisional connector awaiting the display module MPN/pinout.
RF J3: requires the selected Wi-Fi/Bluetooth module and a verified 50 Ω RF connection.
LED and volume controls: require final RK3566 pinmux/GPIO allocation before wiring.
Boot recovery S4: reserved pending the RK3566 hardware guide; do not wire speculatively.
Conclusion
No driver, power-pin, pin-to-pin, or shorted-net conflict was found in the newly wired USB-C/eFuse/ESD, eMMC rail, audio, RTC, LED, controls, or RF nets. The project remains ERC-failing due principally to the known incomplete SoC/PMIC/DDR architecture plus the specific actionable eMMC VDDI, amplifier mode, eFuse current-limit, and INMP441-symbol/privacy gaps. No changes were made, so ERC was not rerun after mutation.
Fresh ERC result counts
Power and subsystem net evidence
Categorization and required disposition
Real errors needing a change
Intentional no-connects
Missing component/symbol pin
Architecture blocks that cannot safely be completed yet