KiCad Export
.kicad_pcb export.Table
| Rail | Source | Expected | Measure At | Current Limit | Pass Criteria |
|---|---|---|---|---|---|
| USB_VBUS_RAW | J1 VBUS before F1 | 5.0 V | J1/F1 pin 1 | 100 mA first power | 4.75-5.25 V |
| VBUS_PROT | F1 output | 5.0 V minus fuse drop | U3 IN/C1 | 100 mA first power | within 0.2 V of USB_VBUS_RAW at light load |
| VBAT | J2 / U3 BAT | 3.0-4.2 V battery | J2 P1/C2 | battery limited | correct polarity, no short |
| SYS | U3 OUT | battery or USB system rail | C3/U4 VIN | 100 mA first power | ~VBAT on battery, ~4.4 V on USB |
| 3V3 | U4 VOUT | 3.3 V | C5/C6/U1 pin 2 | 100 mA first power | 3.14-3.47 V |
Table
| Signal | Expected Idle | Notes |
|---|---|---|
| ESP_EN | High, near 3.3 V | SW1 pulls low for reset |
| ESP_BOOT / IO9 | High, near 3.3 V | SW2 pulls low for bootloader |
| I2C_SDA / I2C_SCL | High, near 3.3 V idle | Pulled up by R10/R11 |
| USB_D_PLUS / USB_D_MINUS | USB activity during enumeration | Route/check as differential pair in layout |
| VBAT_SENSE | VBAT/2 | 4.2 V battery gives ~2.1 V ADC input |
Table
| Section | Result | Notes |
|---|---|---|
| Visual inspection | [ ] Pass / [ ] Fail | |
| Power rails | [ ] Pass / [ ] Fail | |
| USB/programming | [ ] Pass / [ ] Fail | |
| SCD41 sensing | [ ] Pass / [ ] Fail | |
| Battery charging | [ ] Pass / [ ] Fail | |
| Sleep/runtime test | [ ] Pass / [ ] Fail |
Prerequisites
1. Visual Inspection
2. Power Rail Verification
3. Critical Signals
4. Programming and Functional Tests
5. Pass/Fail Summary
Open Layout Recommendations