Power Section Design Update
Thought for 6 sec
To duplicate the project in Flux:
- Open the current project.
- Click the project/menu controls near the project name.
- Choose Fork or Duplicate.
- Create the first copy and name it: GLECS HV Board.
- Go back to the original project and duplicate/fork again.
- Name the second copy: GLECS Logic Board.
Keep the original untouched as your master reference.
After both copies exist, the split workflow is:
- In GLECS HV Board, keep HV parts + J_LINK and remove/exclude logic parts.
- In GLECS Logic Board, keep logic parts + matching J_LINK and remove/exclude HV parts.
- Verify J_LINK pinout matches exactly in both projects.
Duplicate this project twice, keeping the original intact.
Name the first copy "GLECS HV Board" and the second copy
"GLECS Logic Board". Confirm when both copies exist.
Worked for 1 min 58 sec
Cloned a project
GLECS HV Board
Power-section schematic for a 12V DC input generating +4V for a 4G module, +5V, and +3V3 rails with input TVS protection and regulator thermal notes.
Cloned a project
GLECS Logic Board
Power-section schematic for a 12V DC input generating +4V for a 4G module, +5V, and +3V3 rails with input TVS protection and regulator thermal notes.
Both copies now exist, and the original project was left intact.
- GLECS HV Board: /ddsdasxdas/glecs-hv-board
- GLECS Logic Board: /ddsdasxdas/glecs-logic-board
Split both boards
Prepare HV board
Prepare logic board
Create split table
Verify J_LINK contract
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Board Bring-Up Plan — 12V Multi-Rail Power Section
Prerequisites
- Equipment: current-limited bench supply, multimeter, oscilloscope, thermal camera or IR thermometer if available.
- Start with no downstream loads connected to +4V, +5V, or +3V3.
- Initial current limit: 12V input at 100mA, then increase only after rails pass.
- Safety note: +3V3 load current also passes through U_5V because U_3V3 is fed from +5V; verify U_5V temperature under combined worst-case load.
1. Visual Inspection
- Confirm J_PWR pin 1 routes to +12V and pin 2 routes to GND.
- Confirm D_TVS is across +12V and GND.
- Confirm polarized capacitors C_IN, C_4V, C_4V_BULK, C_5V, and C_3V3 are installed with positive terminals on their rails.
- Confirm C_4V_BULK is installed as 470uF low-ESR electrolytic on +4V close to the A7672SA power pins during layout.
- Confirm U_5V and U_3V3 SOT-223 tabs are on their respective outputs and have the required copper/heatsinking in layout. Do not short the tab pads to GND; AMS1117 tab is VOUT.
2. Power Rail Verification
Table
| Rail | Source | Expected Voltage | Tolerance | Measure At | Initial Current Limit | Pass Criteria |
|---|---|---|---|---|---|---|
| +12V | J_PWR pin 1 | 12V input | Supply setting | J_PWR pin 1 / C_IN P1 | 100mA | No excessive input current or heating |
| +4V | U_4V LMR33630 buck via L1 | 4.0V | +/-5% initial check | C_4V P1, C_4V_BULK P1, or L1 pin 2 | 100mA, then 2A burst-capable validation | 3.8V to 4.2V and stable during burst load |
| +5V | U_5V AMS1117-5.0 | 5.0V | +/-3% initial check | C_5V P1 / U_5V VOUT | 100mA, then 150mA combined worst-case check | 4.85V to 5.15V and stable |
| +3V3 | U_3V3 AMS1117-3.3 | 3.3V | +/-3% initial check | C_3V3 P1 / U_3V3 VOUT | 100mA max-load check | 3.20V to 3.40V and stable |
| GND | Common return | 0V reference | N/A | J_PWR pin 2 | N/A | Continuity to all regulator grounds |
Procedure:
- With power off, measure resistance from +12V, +4V, +5V, and +3V3 to GND.
- Apply 12V through a current-limited bench supply at 100mA.
- Measure +12V, then +4V, +5V, and +3V3 in sequence.
- Validate +3V3 at 100mA maximum and direct +5V at 50mA maximum; remember U_5V sees about 150mA total when both are at maximum.
- Check U_5V and U_3V3 temperature after 1 minute and again after thermal soak under intended load.
- Use an oscilloscope to check +4V buck ripple at C_4V_BULK P1 during A7672SA-like 2A burst loading.
3. Critical Power Signals
Table
| Signal | Net Name | Expected State | Measure At | Notes |
|---|---|---|---|---|
| Buck enable | +12V / U_4V EN | High when input applied | U_4V EN | EN is tied to VIN for always-on operation |
| Buck feedback | FB_4V | About 1.0V in regulation | U_4V FB | R_FB_TOP 100k and R_FB_BOT 33.2k set about 4.01V |
| Buck switch node | SW_4V | Switching waveform | U_4V SW / L1 pin 1 | Do not probe without a short ground spring |
| Bootstrap | BOOT_4V | Pulsed above SW | C_BOOT | C_BOOT is 100nF from BOOT to SW |
| U_4V VCC | VCC_U_4V | Internal bias rail | C_VCC P1 | C_VCC is 1uF to GND |
4. Connector Tests
Table
| Connector | Type | Pins to Verify | Test Method |
|---|---|---|---|
| J_PWR | 2-pin screw terminal | Pin 1 +12V, pin 2 GND | Continuity and polarity check before applying power |
5. Functional Validation
Table
| Test | Components Involved | Input | Expected Output | Pass Criteria |
|---|---|---|---|---|
| Input protection continuity | J_PWR, D_TVS, C_IN | No power | D_TVS across +12V/GND, no short at 12V rail | High resistance from +12V to GND |
| 4V buck regulation and burst support | U_4V, L1, C_BOOT, C_4V, C_4V_BULK, feedback divider | 12V input, 200mA average / 2A burst load | +4V rail | 3.8V to 4.2V stable during representative burst load |
| 5V LDO regulation | U_5V, C_5V_IN, C_5V | 12V input, up to 150mA total through U_5V | +5V rail | 4.85V to 5.15V stable |
| 3V3 LDO regulation | U_3V3, C_3V3_IN, C_3V3 | +5V rail, up to 100mA | +3V3 rail | 3.20V to 3.40V stable |
| Thermal sanity check | U_5V, U_3V3 | Intended maximum load | Stable temperature | Junction estimate stays below 125C |
6. Expected Measurements Reference
Table
| Measurement | Location | Expected Value | Instrument |
|---|---|---|---|
| +12V input | J_PWR pin 1 / C_IN P1 | 12V | DMM |
| +4V rail | C_4V_BULK P1 or C_4V P1 | 4.0V nominal | DMM / oscilloscope |
| FB_4V | U_4V FB | About 1.0V | DMM |
| +5V rail | C_5V P1 | 5.0V nominal | DMM |
| +3V3 rail | C_3V3 P1 | 3.3V nominal | DMM |
| U_5V dissipation | U_5V package | About 0.63W typical, 1.05W worst-case from combined +5V/+3V3 loads | Thermal camera / calculation |
| U_3V3 dissipation | U_3V3 package | About 0.10W typical, 0.17W worst-case | Thermal camera / calculation |
Pass/Fail Summary
Table
| Test Section | Result | Notes |
|---|---|---|
| Visual Inspection | [ ] Pass / [ ] Fail | |
| Power Rails | [ ] Pass / [ ] Fail | |
| Critical Power Signals | [ ] Pass / [ ] Fail | |
| Connector Tests | [ ] Pass / [ ] Fail | |
| Functional Validation | [ ] Pass / [ ] Fail |
Board Status: [ ] Ready for downstream-circuit bring-up / [ ] Requires rework
Prerequisites
1. Visual Inspection
2. Power Rail Verification
3. Critical Power Signals
4. Connector Tests
5. Functional Validation
6. Expected Measurements Reference
Pass/Fail Summary
