Could you please clarify which basic functions you want included in the layout for the XC7Z007S-CLG400? For example, should we include dedicated power supplies and decoupling, clock oscillator circuitry, a JTAG/programming header, configuration memory, and typical I/O connectors? Let me know your desired features.

How about we start with clarifying your memory requirements? I’ll ask two questions in total—one at a time.

Question 1:
For the memory block, would you like to include both a DDR memory interface (for main system memory) and also a configuration flash (e.g., QSPI flash) for the FPGA?