Part Data Review and Mismatch Assessment

flux

I reviewed the part project against the datasheet and current project data.
Overall result
  • The part metadata is partially complete.
  • The project already has a Datasheet URL, so I did not search/update it per your rule.
  • The symbol is mostly aligned by pin names/numbers, but there are several likely mismatches and a lot of missing pin metadata.
  • The footprint exists and appears to target a 100-pin VQFN with exposed pad, which matches the datasheet package family, but I could only do a structural cross-check from the available layout data.
Metadata review Current project metadata
  • MPN: USB5807C/KD
  • Manufacturer: Microchip
  • Part Type: Integrated Circuits
  • Designator Prefix: IC
  • Datasheet URL: Mouser-hosted PDF
Datasheet-derived metadata
The datasheet identifies USB5807C/KD as a Microchip Technology Inc. low-power, OEM-configurable 7-port USB 3.1 Gen 1 hub controller in a 100-pin VQFN, 12 mm x 12 mm package, with VDD12 = 1.08 V to 1.32 V and VDD33 = 3.0 V to 3.6 V. It supports 7 downstream ports and 1 upstream port, BC 1.2 features, FlexConnect, OTP/SPI/SMBus configuration, and an exposed pad tied to ground. The datasheet also lists commercial 0 C to 70 C and industrial -40 C to 85 C grades.
Key specs

Table

ItemDatasheet value
PartUSB5807C/KD
ManufacturerMicrochip Technology Inc.
Function7-port USB 3.1 Gen 1 hub controller
Package100-pin VQFN
Body size12 mm x 12 mm
USB speedUp to 5 Gbps
Supplies1.2 V core, 3.3 V I/O
Upstream ports1
Downstream ports7
These values come directly from the datasheet extraction.
Schematic symbol review What matches
  • The project contains 101 terminal components, which is consistent with a 100-pin package plus an exposed ground pad being modeled as a separate terminal, matching the datasheet guidance that the exposed pad must be tied to ground.
  • Many core pins align correctly by name and pin number, for example:
Issues found 1. All terminal pin types are still unset
Every terminal I inspected has Pin Type: Unspecified, including power, ground, clock, control, and USB pins. That weakens ERC behavior and is a clear incompleteness issue for an IC-style part project. The sync workflow specifically expects exact pin typing from the datasheet.
2. At least one definite naming mismatch
That is a likely symbol mismatch on pin 55 and should be verified against the original pin table page in the PDF.
3. Ground/exposed pad naming inconsistency
  • The project models the exposed pad as VSS with pin 101
  • The datasheet text refers to the exposed pad / ground as GND, and the extracted pin table does not provide a separate numeric pin for the pad
So this is not necessarily wrong, but it is a naming/numbering ambiguity:
  • electrically: likely fine
  • library accuracy: should be confirmed whether you want the pad terminal named GND or VSS, and whether 101 is your intended internal convention
4. Missing pin descriptions
The terminals do not appear to carry short per-pin descriptions beyond the designator text, even though the datasheet provides meaningful functional descriptions for pins like VBUS_DET/GPIO16, RESET_N, TESTEN, and the PRT_CTL1/GPIO17 through PRT_CTL7/GPIO23 multifunction pins.
5. Missing symbol organization metadata
I did not see populated Section, Pin Group, Pin Orientation, or sub-symbol grouping on the terminals. For a 100-pin hub IC, that is a major completeness gap.
Footprint review What matches
The datasheet describes a 100-pin VQFN, 12.00 mm x 12.00 mm, 0.40 mm pitch package with an optional/exposed center pad about 8.1 mm and a required ground via array. The project layout contains:
  • a footprint object
  • pad objects for all terminals
  • a separate layout footprint container and shape objects
That is structurally consistent with a VQFN package.
What I could not fully verify
The layout tool did not expose pad geometry dimensions, so I could not directly verify:
  • pad width/length against the datasheet land pattern
  • exact 0.40 mm pitch
  • exact body outline size
  • exact center pad size / thermal via pattern
  • pin 1 indicator geometry
Footprint-specific flags
  • The datasheet calls for the exposed pad to connect to ground with a via array, and recommends filled/tented thermal vias for reflow robustness.
  • I could not confirm the center pad geometry or via pattern from the available layout data.
  • I also could not confirm pin-1 marker placement from the footprint object alone, only that the datasheet requires a visible pin-1 indicator.
Property issues to flag

Table

PropertyStatusNotes
Manufacturer Part NumberOKUSB5807C/KD matches project
Manufacturer NameMostly OKProject says Microchip; datasheet says Microchip Technology Inc.
Part TypeWeakIntegrated Circuits is too generic; USB hub controller would be more precise
Package / Case CodeMissingDatasheet says 100-pin VQFN, 12 mm x 12 mm
Designator PrefixWeakIC works, but U is more conventional for ICs
Datasheet URLPresentExisting URL is Mouser-hosted, not canonical Microchip PDF
Operating VoltageMissingShould reflect the recommended supply context from datasheet
Operating TemperatureMissingCommercial and industrial variants are listed in datasheet
Highest-priority mismatches / gaps

Table

PriorityItemFinding
HighPin metadataAll inspected terminals are Unspecified pin type
HighPin namingSPEED_IND7/BC_IND7/GPIO67 on pin 55 likely disagrees with datasheet extraction
HighSymbol completenessNo visible Section / Pin Group / Pin Orientation organization
MediumGround pad conventionVSS pin 101 vs datasheet GND exposed pad wording
MediumPackage metadataPackage/case code not populated precisely
LowDatasheet URL qualityPresent, but not canonical Microchip-hosted link
Bottom line
Your part project is close on raw pin population, but not yet library-clean:
  • pin count is likely correct
  • many pin names/numbers appear correct
  • pin typing and descriptive metadata are incomplete
  • there is at least one likely symbol naming mismatch
  • the footprint is plausibly correct in package family, but I could not dimensionally verify it from the available layout data
If you want, I can next do a full cleanup pass:
  • normalize project properties
  • verify every terminal against the datasheet
  • assign pin types/descriptions/sections/groups
  • flag or correct the mismatched terminal names
  • and produce a concise final mismatch table.
Clean up pin metadata
Fix mismatched pin 55
Use canonical datasheet
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Documents

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    Assets

    stp

    USB5807C_KD

    USB5807C_KD.stp3D Model
    USB5807C_KD

    USB5807C_KD

    USB5807C_KD Symbol.svgDefault
    kicad_mod

    USB5807C_KD

    QFN40P1200X1200X90-101N-D.kicad_modFootprint
    USB5807CKD-thumb.png

    USB5807CKD-thumb.png

    USB5807CKD-thumbThumbnail

    USB5807C/KD

    USB5807C/KD thumbnail
    USB Hub Controller USB 3.1 I2C, SPI Interface 100-VQFN (12x12) #CommonPartsLibrary #IntegratedCircuit #Interface

    Properties

    USB5807C/KD

    Microchip

    Integrated Circuits

    mouser.com/datasheet/2/268/00002237A-1026041.pdf

    IC

    creativecommons.org/licenses/by/4.0/

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