Part Information Review and Datasheet Update

1:57

Thought for 2 sec

1/3 Read current symbol section/group/order properties for all terminals

Thought for 6 sec

Read schematic.

Read "Pin Description table pins 1 through 30 MAX77960B MAX77961B functional descriptions" in MAX77960B-MAX77961B.pdf.

Read "Typical Application Circuit MAX77960B MAX77961B pin groups CHGIN SYS BATT I2C configuration status" in MAX77960B-MAX77961B.pdf.

Read MAX77960B-MAX77961B.pdf.

Read MAX77960B-MAX77961B.pdf.

Thought for 1 sec

2/3 Compare grouping against datasheet functional pin groups

Thought for 21 sec

Thought for 3 sec

3/3 tasks completed.

Thought for a moment

Reviewed the parametric symbol grouping and updated the findings in MAX77961BEFV12+ Datasheet, Symbol, and Footprint Review.
Summary: the grouping is usable but not fully library-quality. Main issues: STBY should not be in Status/Interrupt, DISQBAT should be Hardware Control, AVL/PVL should be Bias Supplies, CSINP/CSINN should be CHGIN/Input Current Sense, and BST/LX pins should be Switching Power Stage rather than generic Power Input.
Fix the symbol sections and pin groupings to match the datasheet.

0:10

Thought for 6 sec

Thought for a moment

I’ll apply the recommended datasheet-aligned section and pin group names across all 30 terminals, then verify the resulting symbol organization.

1:21

Thought for 5 sec

1/2 Update Section and Pin Group properties for all 30 terminals

Read 1 knowledge entry.

Thought for 15 sec

Thought for 4 sec

2/2 Verify the updated symbol section/group organization

Thought for 1 sec

Read schematic.

Thought for 2 sec

Completed 2 design checks.

Thought for 2 sec

2/2 tasks completed.

Thought for a moment

Fixed the parametric symbol organization across all 30 terminals.
Updated sections and pin groups now follow the datasheet functional blocks: CHGIN / Input Current Sense, Switching Power Stage, System / Battery Power Path, Hardware Control, Charger Programming, Bias Supplies, I2C Communication, Status / Interrupt Outputs, Thermal / Battery Monitor, and Ground. Verified afterward, and the relevant terminal review checks returned no issues.
Run ERC/DRC
Check I2C pullups
Review layout constraints
Document grouping
Review BOM

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MAX77961BEFV12+ Datasheet, Symbol, and Footprint Review
Date: 2026-05-26
Reviewed Part Information
Key Datasheet Specs
  • Input operating range: 3.5 V to 25.4 V, 30 VDC withstand
  • MAX77961B programmable input current limit: 100 mA to 6.3 A
  • MAX77961B programmable constant-current charge: 100 mA to 6 A
  • Reverse buck / OTG: 5.1 V typical, up to 3 A support
  • Switching frequency options: 600 kHz or 1.2 MHz
  • MAX77961BEFV12+ CNFG option: 1.2 MHz, 2S battery only, CNFG tied to PVL or 69.8 kOhm per datasheet Table 1
  • Battery type: 2S/3S Li-Ion / Li-Poly family; EFV12 variant is 2S at 1.2 MHz per Table 1
  • Temperature range found from distributor listing: -40 C to +85 C
  • External support requirements called out in pin table:
    • BST1 to LX1: 0.22 uF / 6.3 V
    • CHGIN to PGND: two 10 uF / 35 V ceramics
    • BST2 to LX2: 0.22 uF / 6.3 V
    • SYS to PGND: minimum two 47 uF / 25 V ceramics
    • BATT to PGND: 10 uF / 25 V
    • AVL to GND: 4.7 uF / 6.3 V
    • PVL to GND: minimum 4.7 uF / 6.3 V
    • AVL to PVL: 4.7 ohm resistor
    • STAT pullup: 10 kOhm
    • INTB and INOKB: open-drain outputs requiring pullups
    • THM: NTC network to GND/AVL or tie options for disabling/emulating battery removal
Datasheet Pin Table vs Project Symbol

Table


PinDatasheet nameDatasheet function summaryProject symbol terminal presentProject pin type
1BST1High-side input MOSFET driver supply; bypass to LX1 with 0.22 uFYesInput
2CHGINBuck-boost charger input; reverse-mode buck output; bypass to PGNDYesInput
3LX1Inductor connection oneYesUnspecified
4PGNDPower ground for buck-boost low-side MOSFETsYesPower In
5LX2Inductor connection twoYesUnspecified
6SYSSystem supply output; bypass to PGNDYesPower In
7OTGENActive-high OTG enable inputYesInput
8DISQBATActive-high QBAT disconnect / charge-disable inputYesInput
9BST2High-side output MOSFET driver supply; bypass to LX2 with 0.22 uFYesPower In
10BATSNBattery differential sense negative inputYesInput
11BATSPBattery differential sense positive inputYesInput
12BATTBattery power connection; bypass to PGND; all BATT pins together externallyYesPower In
13THMThermistor inputYesInput
14SCLI2C clock inputYesInput
15SDAI2C data; open-drain outputYesOutput
16STATCharger status; active-low open-drain output; 10 kOhm pullupYesOutput
17INOKBInput/OTG power-OK; active-low open-drain outputYesOutput
18INTBActive-low open-drain interrupt outputYesOutput
19SYSASYS voltage sensing input for SYS UVLO/OVLOYesInput
20GNDAnalog groundYesPower Out
21INLIMInput current limit programming inputYesInput
22CNFGDevice configuration input; programs switching frequency and cell countYesInput
23ISETFast-charge current programming inputYesInput
24VSETCharge termination voltage programming inputYesInput
25ITOTop-off current programming inputYesInput
26AVLAnalog voltage supply for low-noise circuits; bypass to GND and connect to PVL through 4.7 ohmYesPower In
27PVLInternal bias regulator high-current output bypass; not recommended for external loads except pullupsYesOutput
28STBYActive-high standby inputYesInput
29CSINPInput current-sense positive inputYesInput
30CSINNInput current-sense negative inputYesInput
Footprint Cross-Check
  • Layout contains 30 named pads matching all datasheet pin names/numbers: BST1, CHGIN, LX1, PGND, LX2, SYS, OTGEN, DISQBAT, BST2, BATSN, BATSP, BATT, THM, SCL, SDA, STAT, INOKB, INTB, SYSA, GND, INLIM, CNFG, ISET, VSET, ITO, AVL, PVL, STBY, CSINP, CSINN.
  • Layout also contains one unnamed pad under the footprint mounts container. This is likely the exposed/thermal center pad, but it is not named or electrically described in the current project data returned by the layout query.
  • Package family/pin count matches the datasheet/product-page package: 30-lead FC2QFN, 4 mm x 4 mm.
Mismatches / Issues Flagged
  1. Pin descriptions are missing from the project terminals. The schematic terminals include pin names, pin numbers, and broad pin types, but no per-pin Pin Description properties were present. The datasheet descriptions above should be copied into the terminals if this part is intended for library-quality reuse.
  2. Several project pin types are electrically imprecise:
    • SYS is marked Power In, but the datasheet describes it as System Supply Output.
    • GND is marked Power Out; ground pins are normally ground/passive/power reference rather than output.
    • PGND is marked Power In; should be ground/power ground.
    • SDA is marked Output, while I2C SDA is bidirectional/open-drain in practical use; the datasheet text says open-drain output.
    • LX1/LX2 are Unspecified; they should be switch/inductor connection pins, typically passive/power-switching nodes.
    • BST1 is marked Input, but it is a driver supply bootstrap pin.
  3. The footprint's unnamed mount pad should be explicitly verified against the Analog Devices package drawing. If it is the exposed thermal pad, it should have a clear pad designation and connection guidance if the datasheet/package drawing specifies one.
  4. The project-level Datasheet URL was added, but the platform reported it as a non-standard project property. If this is a part-library project, consider mirroring the same URL into the canonical component/part metadata field if available.
  5. The web product page did not visibly list MAX77961BEFV12+ in its current ordering table; Mouser lists MAX77961BEFV12+ and the datasheet Table 1 includes MAX77961BEFV12+ as the 1.2 MHz / 2S option. This is not a symbol/footprint mismatch, but it is worth checking lifecycle/ordering status before production use.
Verdict
  • Symbol pin names and pin numbers match the datasheet pin table for all 30 leads.
  • Footprint named pads match all 30 datasheet lead names.
  • Package/pin count match: 30-lead FC2QFN 4 mm x 4 mm.
  • Main improvements needed are metadata quality: add exact datasheet pin descriptions, refine pin electrical types, and verify/name the exposed thermal pad if applicable.
Parametric Symbol Section / Grouping Review
Reviewed against the official MAX77960B/MAX77961B pin description table and typical application circuit.
Current Section Assignments

Table


Current sectionPins assigned
Power InputBST1, CHGIN, LX1, LX2, BST2
System PowerSYS, DISQBAT, SYSA
Battery / ChargingBATSN, BATSP, BATT, CSINP, CSINN
Thermal / MonitoringTHM
I2C CommunicationSCL, SDA
Status / InterruptSTAT, INOKB, INTB, STBY
Control / ConfigurationOTGEN, INLIM, CNFG, ISET, VSET, ITO, AVL, PVL
GroundPGND, GND
Assessment
The symbol is generally usable and organized by functional intent rather than raw package order. The I2C, ground, battery, thermal, and status outputs are mostly sensible. However, several pins are grouped in sections that do not precisely match their datasheet role:
  1. STBY is currently in Status / Interrupt, but the datasheet defines it as an active-high control input. It belongs with hardware control pins, not status outputs.
  2. DISQBAT is currently in System Power, but the datasheet defines it as an active-high control input for the BATT-to-SYS QBAT FET / charging disable behavior. It is better grouped with hardware control pins.
  3. OTGEN is currently in Control / Configuration; that is acceptable, but it is specifically a hardware mode-control input and should be near DISQBAT and STBY.
  4. AVL and PVL are currently in Control / Configuration, but the datasheet defines them as internal analog/bias supply bypass pins. They should be in a bias/internal supply section rather than grouped with resistor-programming pins.
  5. CSINP and CSINN are currently in Battery / Charging, but the datasheet defines them as input current-sense pins associated with CHGIN/input current monitoring. They would be clearer in an input current-sense / CHGIN input section.
  6. BST1, BST2, LX1, and LX2 are currently in Power Input. These are switching power-stage pins and bootstrap driver supplies, not simple input power pins. A dedicated switching power-stage section would be clearer.

Table


Recommended sectionPins
CHGIN / Input Current SenseCHGIN, CSINP, CSINN
Switching Power StageBST1, LX1, BST2, LX2
System / Battery Power PathSYS, SYSA, BATT, BATSP, BATSN
Hardware ControlOTGEN, DISQBAT, STBY
Charger ProgrammingINLIM, CNFG, ISET, VSET, ITO
Bias SuppliesAVL, PVL
I2C CommunicationSCL, SDA
Status / Interrupt OutputsSTAT, INOKB, INTB
Thermal / Battery MonitorTHM
GroundPGND, GND
Verdict on Grouping
The current grouping is close but not fully correct for a library-quality parametric symbol. The most important fixes are moving STBY out of status, moving DISQBAT into hardware control, separating AVL/PVL as bias supplies, and separating CSINP/CSINN as CHGIN input current-sense pins.

    Reviewed Part Information

    Key Datasheet Specs

    Datasheet Pin Table vs Project Symbol

    Footprint Cross-Check

    Mismatches / Issues Flagged

    Verdict

    Parametric Symbol Section / Grouping Review

    Current Section Assignments

    Assessment

    Recommended Section Organization

    Verdict on Grouping

Documents

    MAX77961BEFV12+ Datasheet, Symbol, and Footprint Review

Assets

MAX77961BEFV12+

MAX77961BEFV12+

MAX77961BEFV12+ MAX77961BEFV12+_0_1 Symbol.svgDefault
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MAX77961BEFV12+

MAXIM_90-100100.step3D Model
kicad_mod

MAX77961BEFV12+

90-100100_F304A4F&plus_1_MXM.kicad_modFootprint

MAX77961BEFV12+

MAX77961BEFV12+ thumbnail
  • Voltage Regulator IC 1 Output 30-FC2QFN (4x4)
The MAX77960B/MAX77961B are high-performance wide-input 3A (MAX77960B)/6A (MAX77961B) buckboost chargers with Smart Power Selector™ and operate as a reverse buck converter without an additional inductor, allowing the ICs to power USB on-the-go (OTG) accessories. The devices integrate low-loss power switches and provide high efficiency, low heat, and fast battery charging in a small solution size. The reverse buck has true load disconnect and is protected by an adjustable output current limit. The devices are highly flexible and programmable through I2C configuration or autonomously through resistor configuration. The battery charger includes the Smart Power Selector to accommodate a wide range of battery sizes and system loads. The Smart Power Selector allows the system to start up smoothly when an input source is available even when the battery is deeply discharged (dead battery) or missing. For battery safety/authentication reasons, the ICs can be configured to keep charging disabled, and allow the DC-DC to switch and regulate the SYS voltage. The system processor can later enable charging using I2C commands as appropriate. Alternatively, the ICs can be configured to automatically start charging.

Properties

MAX77961BEFV12+

Analog Devices Inc./Maxim Integrated

Power Management

U

parametric-v1

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