# 88E2010-A1-BUS4C000 (Component) ## Description 1/1 Transceiver Full, Half IEEE 1149.1, IEEE 802.3 168-HFCBGA (10x12) #CommonPartsLibrary #IntegratedCircuit #Interface #Driver #Receiver #Transceiver ## Component Details - **Owner:** adrian95 - **Created:** 6/6/2024 - **Last Updated:** 6/10/2024 - **Visibility:** Public - **Manufacturer Part Number:** 88E2010-A1-BUS4C000 - **License:** https://creativecommons.org/licenses/by/4.0/ - **Part Type:** Integrated Circuit - **Datasheet URL:** https://www.marvell.com/content/dam/marvell/en/public-collateral/phys-transceivers/marvell-phys-transceivers-alaska-m-88e20xxl-datasheet.pdf - **Manufacturer Name:** Marvell Semiconductor, Inc. - **Used in:** 1 project ## Distributor Pricing (qty 1) *Pricing shown for quantity 1. For price breaks and other quantities, open in Flux.* | Distributor | Unit Price (qty 1) | Stock | |------------|--------------------|-------| | [Digi-Key](https://www.digikey.com/en/products/detail/marvell-semiconductor-inc/88E2010-A1-BUS4C000/10478790) | N/A | N/A | | [LCSC](https://www.lcsc.com/product-detail/C1566838.html) | $15.5789 | 0 | | [Mouser](https://www.mouser.com/en/ProductDetail/Marvell/88E2010-A1-BUS4C000?qs=qSfuJ%252Bfl%2Fd5%2Fk6I5ORFvBg%3D%3D) | $47.01 | 454 | - **Part Type:** Integrated Circuits - **Sub-Type:** Logic - **MPN:** 88E2010-A1-BUS4C000 - **Pin Count:** 168 - **Logic Function:** AND ## Pins | Pin | Name | Type | |-----|------|------| | A1 | VSS_1 | | | A2 | AVSS_1 | | | A3 | SOP[3] | | | A4 | AVSS_2 | | | A5 | SOP[2] | | | A6 | AVSS_3 | | | A7 | SOP[1] | | | A8 | AVSS_4 | | | A9 | SOP[0] | | | A10 | AVSS_5 | | | A11 | SHSDACP | | | A12 | AVSS_6 | | | B1 | MDC | | | B2 | TEST | | | B3 | SON[3] | | | B4 | AVSS_7 | | | B5 | SON[2] | | | B6 | AVSS_8 | | | B7 | SON[1] | | | B8 | AVSS_9 | | | B9 | SON[0] | | | B10 | AVSS_10 | | | B11 | SHSDACN | | | B12 | SIREF | | | C1 | MDIO | | | C2 | INTN | | | C3 | AVSS_11 | | | C4 | SIP[3] | | | C5 | AVSS_12 | | | C6 | SIP[2] | | | C7 | AVSS_13 | | | C8 | SIP[1] | | | C9 | AVSS_14 | | | C10 | SIP[0] | | | C11 | AVSS_15 | | | C12 | STSTPT | | | D1 | CONFIG[1] | | | D2 | CONFIG[2] | | | D3 | CONFIG[6] | | | D4 | SIN[3] | | | D5 | AVSS_16 | | | D6 | SIN[2] | | | D7 | AVSS_17 | | | D8 | SIN[1] | | | D9 | AVDDS_1 | | | D10 | SIN[0] | | | D11 | SPI_SSN | | | D12 | RESETN | | | E1 | LED[0] | | | E2 | CONFIG[3] | | | E3 | AVDDS_2 | | | E4 | AVDDR_1 | | | E5 | AVSS_18 | | | E6 | VDDR09 | | | E7 | AVSS_19 | | | E8 | AVDDR_2 | | | E9 | AVDDC_1 | | | E10 | VSEL_R | | | E11 | SPI_MOSI | | | E12 | SPI_MISO | | | F1 | LED[1] | | | F2 | LED[3] | | | F3 | VSEL_M | | | F4 | VSS_2 | | | F5 | DVDD_1 | | | F6 | VSS_3 | | | F7 | DVDD_2 | | | F8 | VSS_4 | | | F9 | VHV | | | F10 | GPIO[0] | | | F11 | VSS_5 | | | F12 | SPI_CLK | | | G1 | LED[2] | | | G2 | CONFIG[4] | | | G3 | VDDOM | | | G4 | VSS_6 | | | G5 | DVDD_3 | | | G6 | VSS_7 | | | G7 | DVDD_4 | | | G8 | VSS_8 | | | G9 | VDDOR | | | G10 | GPIO[1] | | | G11 | RCLK1 | | | G12 | GPIO[5] | | | H1 | CONFIG[0] | | | H2 | CONFIG[5] | | | H3 | CONFIG[7] | | | H4 | VSS_9 | | | H5 | DVDD_5 | | | H6 | VSS_10 | | | H7 | DVDD_6 | | | H8 | VSS_11 | | | H9 | VSEL_T | | | H10 | GPIO[2] | | | H11 | GPIO[4] | | | H12 | RCLK0 | | | J1 | CLKN | | | J2 | VDDCTRL | | | J3 | VDDOL | | | J4 | VSS_12 | | | J5 | DVDD_7 | | | J6 | VSS_13 | | | J7 | DVDD_8 | | | J8 | VSS_14 | | | J9 | VDDOT | | | J10 | VSS_15 | | | J11 | TMS | | | J12 | TDO | | | K1 | CLKP | | | K2 | CLK_SEL[0] | | | K3 | VSEL_L | | | K4 | AVDDL_1 | | | K5 | AVSS_20 | | | K6 | AVDDL_2 | | | K7 | AVSS_21 | | | K8 | AVDDL_3 | | | K9 | AVSS_22 | | | K10 | GPIO[3] | | | K11 | TDI | | | K12 | TCK | | | L1 | XTAL2 | | | L2 | CLK_SEL[1] | | | L3 | ATN | | | L4 | AVSS_23 | | | L5 | AVDDH_1 | | | L6 | AVSS_24 | | | L7 | AVDDH_2 | | | L8 | AVSS_25 | | | L9 | AVDDH_3 | | | L10 | AVSS_26 | | | L11 | TEST_CLKP | | | L12 | TRSTN | | | M1 | XTAL1 | | | M2 | AVDDC_2 | | | M3 | ATP | | | M4 | AVDDT_1 | | | M5 | AVSS_27 | | | M6 | AVDDT_2 | | | M7 | AVSS_28 | | | M8 | AVDDT_3 | | | M9 | AVSS_29 | | | M10 | AVDDC_3 | | | M11 | TEST_CLKN | | | M12 | CTSTPT | | | N1 | AVSSC | | | N2 | TSTCN | | | N3 | AVSS_30 | | | N4 | MDIP[3] | | | N5 | MDIN[2] | | | N6 | AVDDT_4 | | | N7 | CMN | | | N8 | MDIP[1] | | | N9 | MDIN[0] | | | N10 | AVSS_31 | | | N11 | CHSDACN | | | N12 | CIREF | | | P1 | AVSS_32 | | | P2 | TSTCP | | | P3 | AVSS_33 | | | P4 | MDIN[3] | | | P5 | MDIP[2] | | | P6 | AVSS_34 | | | P7 | CMP | | | P8 | MDIN[1] | | | P9 | MDIP[0] | | | P10 | AVSS_35 | | | P11 | CHSDACP | | | P12 | AVSS_36 | | --- *Generated from [https://www.flux.ai/adrian95/88e2010-a1-bus4c000~q6e](https://www.flux.ai/adrian95/88e2010-a1-bus4c000~q6e)*