ESP32 Mini Drone Flight Controller Design


I’ll tighten the placement and improve robustness now: compact the board grouping, strengthen power/IMU/antenna placement priorities, then rerun checks and only stop before routing for your approval.
The compacting pass tightened most support parts, but it pushed the ESP32 module too far toward the edge. I’m correcting that now so the antenna still faces outward while the module body/pads remain safely manufacturable.
I’m blocked because credits ran out just before I could run the final post-placement review.
Completed this session:
  • Continued PCB placement on the existing 50 × 50 mm, 4-layer board.
  • Corrected the mislabeled duplicate ground-like net for the GPIO8/status LED path to ESP_GPIO8_LED_BOOT before placement.
  • Placed all 29 physical components by functional block.
  • Enhanced placement for compactness and robustness:
    • ESP32-C3 module is now fully inside the board with antenna side at the top edge.
    • BMI270 IMU is kept central for better motion sensing.
    • TPS63001 power stage is compact around U3/L3/C4/C5/C6/C7/J1.
    • LiPo, motor, GPS/UART, programming headers, and reset/boot buttons remain edge-accessible.
    • Decoupling and strap components remain close to their IC pins.
    • LED parts were moved away from the ESP32 antenna area.
    • UART programming header was moved closer to the ESP32 to reduce long UART paths.
  • Placement tool reported no overlap, off-board, unplaced, spacing, or critical placement problems after the final correction.
Still required:
  • Re-run post-placement review.
  • Confirm only expected unrouted-airwire issues remain.
  • Fix any actual placement/clearance issues if found.
  • Ask for your approval before routing traces.
Run ERC/DRC
Check antenna clearance
Optimize power loop
Inspect edge access

Board Bring-Up Plan — ESP32 Mini Drone Flight Controller
Prerequisites
  • Equipment: current-limited bench supply or protected 1S LiPo source, multimeter, oscilloscope if available, USB-UART adapter, PlatformIO workstation, GPS module if testing return-to-home expansion, and a logic analyzer if available.
  • Firmware reference: Firmware Starter
  • Safety: perform all motor-output tests with propellers removed. Start with a current limit of 100 mA, then increase only after the 3.3 V rail is verified.
1. Visual Inspection
  • Check U1 ESP32-C3-MINI-1U-N4, U2 BMI270, and U3 TPS63001DRCR orientation.
  • Confirm J1 LiPo connector polarity: J1 P1 = VBAT, J1 P2 = GND.
  • Inspect U3 power components: L3 = 2.2 µH, C4 = 10 µF input, C5/C6 = 10 µF output capacitors, C7 = 100 nF VOUT bypass.
  • Confirm no solder bridges on U1 ground pads, U2 LGA/QFN-style pads, and U3 exposed pad.
2. Power Rail Verification

Table


RailSourceExpected VoltageToleranceMeasure AtInitial Current LimitPass Criteria
VBATJ1 P1 LiPo input3.0–4.2 VSource dependentJ1 P1 to GND100 mA first power-onNo short; voltage present at U3 VIN/VINA
3V3U3 TPS63001 VOUT3.3 V±5% bring-up limitC5 P1/C6 P1/C7 P1, U1 3V3, J4 pin 3, J3 pin 3100 mA then 500 mA3.135–3.465 V and no overheating
VBAT_SENSER5/R6 dividerVBAT × 220k/(470k+220k)±10%U1 GPIO0 / C8 P1N/A4.2 V input reads about 1.34 V
Procedure:
  1. With no battery connected, measure resistance from VBAT to GND and 3V3 to GND; investigate very low resistance before applying power.
  2. Apply 3.7 V to J1 with 100 mA current limit.
  3. Verify U3 output is near 3.3 V before connecting USB-UART or external GPS modules.
  4. Increase current limit to 500 mA only after the rail is stable.
  5. Check 3V3 ripple at C5/C6 with an oscilloscope if available.
3. Critical Signal Verification

Table


SignalNet NameExpected StateMeasure AtNotes
ESP32 enableESP_ENHigh near 3.3 V after startupU1 EN, R1 P2, SW1 P1SW1 should pull low to reset
Boot modeESP_BOOTHigh normally; low when SW2 pressedU1 GPIO9, R2 P2Hold low during reset to enter bootloader
GPIO2 strapESP_GPIO2_STRAPPulled high by R8U1 GPIO2, R8 P2Boot stability strap
GPIO8 LED/strapESP_GPIO8_LED_BOOTPulled high by R9; firmware can pull low for LEDU1 GPIO8, D1 cathodeActive-low LED path via R7/D1
I2C SDAI2C_SDAIdle high at 3.3 VU1 GPIO4, U2 SDXR3 pull-up
I2C SCLI2C_SCLIdle high at 3.3 VU1 GPIO5, U2 SCXR4 pull-up
IMU INT1IMU_INT1Firmware-dependentU1 GPIO3, U2 INT1Used for BMI270 interrupt/data-ready
4. Connector and Interface Tests

Table


ConnectorTypePins to VerifyTest Method
J12-pin JST-PH LiPo inputP1 VBAT, P2 GNDPolarity and continuity check before power
J24-pin JST-SH motor logic outputsP1 MOTOR1, P2 MOTOR2, P3 MOTOR3, P4 MOTOR4Use firmware PWM test with propellers removed
J34-pin JST-SH GPS/UART expansionP1 GPS_RX_TO_ESP, P2 GPS_TX_FROM_ESP, P3 3V3, P4 GNDLoopback or GPS NMEA serial test at 9600 baud
J44-pin JST-SH programming/log headerP1 UART0_TX, P2 UART0_RX, P3 3V3, P4 GNDUSB-UART serial monitor and flashing test
5. Programming and Debug Interface

Table


InterfaceSignalsConnectorTool
ESP32 UART bootloader/debugUART0_TX, UART0_RX, 3V3, GND, BOOT/SW2, RESET/SW1J4 + buttonsPlatformIO / esptool.py
Procedure:
  1. Connect USB-UART at 3.3 V logic only: J4 P1 to adapter RX, J4 P2 to adapter TX, J4 P4 to GND.
  2. Hold SW2, tap SW1, then release SW2 to enter bootloader.
  3. Run pio run -t upload using the firmware starter project.
  4. Run pio device monitor -b 115200 and confirm startup text.
6. Functional Validation

Table


TestComponents InvolvedInputExpected OutputPass Criteria
3.3 V regulator startupJ1, U3, L3, C4/C5/C6/C73.0–4.2 V at VBAT3.3 V railStable 3V3, no thermal issue
ESP32 bootU1, R1, C2, SW1/SW2, J4Power + serial connectionBoot log at 115200 baudFirmware starts reliably
BMI270 I2C detectionU1, U2, R3/R4, C3/C9Firmware I2C scan/initBMI270 detected at 0x68IMU telemetry prints IMU=ok
Battery ADCU1 GPIO0, R5/R6/C8Known VBAT voltageReported VBAT close to expectedWithin ±10% before calibration
Status LEDU1 GPIO8, R7, D1, R9Firmware toggles LEDLED blinks/turns onActive-low control works
Motor outputsU1 GPIO1/6/7/10, J2Safe PWM testPWM visible on J2 pinsNo props attached; correct pins toggle
GPS/UART expansionU1 GPIO18/19, J3GPS module or UART loopbackNMEA or echoed dataSerial data visible in monitor
Low-battery behaviorFirmware + VBAT_SENSELower bench supply slowlyWarning/failsafe behaviorLED warning and emergency landing hook triggers
7. Expected Measurements Reference

Table


MeasurementLocationExpected ValueToleranceInstrument
3V3 railC5 P1 to GND3.3 V±5% bring-upMultimeter
VBAT divider at 4.2 V inputC8 P1 / U1 GPIO0~1.34 V±10%Multimeter
I2C idle highU2 SDX/SCX3.3 V±10%Multimeter/oscilloscope
EN idleU1 EN3.3 V±10%Multimeter
BOOT button pressedU1 GPIO9<0.3 VN/AMultimeter
Motor PWMJ2 P1–P40–3.3 V PWMFirmware-dependentOscilloscope/logic analyzer
Pass/Fail Summary

Table


Test SectionResultNotes
Visual Inspection[ ] Pass / [ ] Fail
Power Rails[ ] Pass / [ ] Fail
Critical Signals[ ] Pass / [ ] Fail
Connectors[ ] Pass / [ ] Fail
Programming[ ] Pass / [ ] Fail
Functional Validation[ ] Pass / [ ] Fail
Board Status: [ ] Ready for flight testing without props / [ ] Requires rework
Open Bring-Up Risks
  • Motor outputs are logic-level control lines only; confirm the external ESC/driver input voltage and timing before connecting motors.
  • Return-to-home depends on an external GPS on J3 and firmware support beyond this starter.
  • The first powered motor tests must be done with propellers removed.
  • Prerequisites

  • 1. Visual Inspection

  • 2. Power Rail Verification

  • 3. Critical Signal Verification

  • 4. Connector and Interface Tests

  • 5. Programming and Debug Interface

  • 6. Functional Validation

  • 7. Expected Measurements Reference

  • Pass/Fail Summary

  • Open Bring-Up Risks