# Advanced Health Smartwatch
## Description
Advanced health smartwatch platform with multimodal sensing, on-device AI, Wi-Fi plus cellular/eSIM connectivity, secure cloud sync, OTA firmware updates, and automatic emergency outreach over cellular/eSIM for fall and critical-event protection.
## Project Details
- **Owner:** abilkus
- **Created:** 4/2/2026
- **Last Updated:** 4/2/2026
- **Visibility:** Public
- **Priorities:** Priority 1: robust heart-rate/PPG, IMU, sleep, HRV, fall detection, and power architecture. Priority 2: SpO2, skin temperature, respiration, and stress estimation. Priority 3: ECG, blood-pressure support strategy, sweat/skin conductance, hydration trend estimation, and advanced analytics. Priority 4: energy harvesting optimization and docked data transfer refinement.
- **Data Flow Diagram:** Raw biosignals and motion streams feed local preprocessing, quality assessment, and feature extraction on-device. Derived features drive sleep, stress, HRV, respiration, fall, activity, calorie, and hydration trend models. User-facing summaries and alerts are rendered locally while selected records are encrypted, buffered, and synchronized through cellular or docked charging-link transfer. Privacy controls gate export, consent, and retention behavior.
- **Implementation Details:** Connectivity policy: prefer Wi-Fi for user provisioning, local app/device interactions, routine telemetry sync, and firmware downloads when trusted service is available. Maintain cellular/eSIM as standby for extended coverage, cloud availability fallback, and mandatory emergency-notification transport. During fall detection or other classified critical wearer events, bypass routine network priority and immediately arm the cellular/eSIM emergency path, prompt the wearer for cancellation when possible, attach location and event context, then contact the user-defined emergency contact with escalation and retry behavior if acknowledgement is not received. Securely store credentials, emergency contacts, consent state, and event logs using encrypted local storage and authenticated cloud transport. Support signed OTA firmware and model updates with rollback-safe staging.
- **Dependencies:** Expanded sensing depends on high-quality skin contact design, analog front-end isolation, motion-artifact mitigation, calibration pipelines, sufficient battery/PMIC headroom, secure data models, and firmware support for adaptive duty cycling. ECG and blood-pressure related features depend on electrode placement strategy and clinical-claim boundary decisions. Hydration and stress estimates depend on multi-sensor fusion quality and user baseline calibration.
- **UX Considerations:** Expose everyday metrics as glanceable summaries while reserving higher-friction workflows for ECG, blood-pressure-related spot checks, calibration, and hydration/stress trend interpretation. Include sensor-quality feedback, charging/docking states, privacy notices, emergency/fall workflows, and configurable watch-face data density so the expanded feature set remains understandable on a small display.
- **Human Interface:** User interface must support a swappable standard-watch-face display concept, quick health summaries, guided ECG/spot-measurement workflows, sleep/stress/recovery insights, fall alerts, privacy controls, consent settings, and intuitive access to expanded health datasets without overwhelming the watch-face experience.
- **Connectivity:** Wi-Fi for provisioning, local interactions, and routine sync; cellular/eSIM for emergency outreach, extended coverage, secure cloud upload, and OTA fallback.
- **Privacy and Security:** Encrypt sensitive biometric data at rest and in transit, minimize export of raw biosignals when features can be derived on-device, support explicit consent for sharing ECG/location/health summaries, provide retention and deletion controls, separate emergency sharing from routine analytics, and maintain secure provisioning for eSIM, dock sync, and companion access.
- **Reliability Target (MTBF):** Long-term field firmware support with rollback-safe authenticated update capability
- **Software:** Adaptive edge inference on-device with cloud-assisted model improvement, Wi-Fi provisioning manager, network-priority supervisor, emergency event state machine, secure OTA client, and consent-governed encrypted telemetry upload.
- **Open Questions:** Select the primary compute platform and RTOS/application partitioning. Define exact blood-pressure methodology and whether it remains wellness-only. Decide whether ECG uses bezel/case electrode touch or dedicated contact pads. Confirm whether dock data transfer is NFC, inductive sideband, or another protocol. Quantify the real contribution and mechanical cost of thermal, kinetic, and solar harvesting. Define clinical vs wellness claims, regional privacy obligations, and certification targets.
- **Functional Requirements:** Measure or derive heart rate, movement/activity, blood pressure strategy inputs, SpO2, skin temperature, single-lead ECG, respiration rate, sleep metrics, HRV, fall events, activity class, calorie/energy expenditure, stress level, hydration trend estimate, sweat/skin conductance, GPS location, and user alerting states. Support both continuous background sensing and guided spot-check workflows with confidence/quality scoring.
- **Compliance Notes:** Differentiate wellness features from potentially regulated medical claims, especially for ECG, blood pressure, SpO2, fall alerts, and hydration/stress insights. Plan traceability for algorithms, data quality thresholds, user labeling, disclaimer language, regional privacy obligations, and any certification path needed for cellular, wireless charging, and health-data handling.
- **System Architecture:** ```mermaid
flowchart TD
A[NRF5340 Main MCU] --> B[NDP120 AI]
A --> C[W25Q128 Flash]
A --> D[ATECC608A Secure Element]
A --> E[BG95 Cellular Modem]
A --> F[Health Sensors]
A --> G[WiFi Companion]
H[3V3 Rail] --> A
H --> B
H --> C
H --> D
I[VSYS Modem Rail] --> E
J[Energy Harvesting and Charging] --> H
J --> I
```
- **Power Requirements:** Wi-Fi remains the preferred high-throughput sync path when available; cellular/eSIM stays in low-duty standby and is elevated immediately for critical-event outreach, wide-area fallback, and emergency acknowledgement retries.
- **Compliance:** Privacy-by-design architecture, encrypted storage and transport, explicit consent for health/location sharing, emergency-contact data minimization, secure credential handling, authenticated OTA updates, and regional review for health-data and cellular/eSIM obligations.
- **Role:** System concept and baseline plan for an advanced modular health-tracking smartwatch
## Key Components
### IC1 — [BQ24075TRGTR](https://www.flux.ai/adrian95/bq24075trgtr~7p4.md)
- Part Type: Integrated Circuit
- Package: QFN
- Datasheet URL: http://componentsearchengine.com/Datasheets/1/BQ24075TRGTR.pdf
- Implementation Details: Primary Li-ion charger and power-path manager for USB or wireless input to battery-backed system rail. Input protection, battery connector, and downstream regulated 3V3 rail integration remain pending.
- Role Details: USB/wireless input battery charger and system power-path manager
- Manufacturer Part Number: BQ24075TRGTR
- Manufacturer Name: Texas Instruments
- Package or Case Code: QFN50P300X300X100-17N-D
- Role: Charge and Power Path
- License: https://creativecommons.org/licenses/by/4.0/
**Pins:**
- ~CE [pin 4]
- ~CHG [pin 9]
- ~PGOOD [pin 7]
- BAT_1 [pin 2]
- BAT_2 [pin 3]
- EN1 [pin 6]
- EN2 [pin 5]
- EP [pin 17]
- ILIM [pin 12]
- IN [pin 13]
- ISET [pin 16]
- OUT_1 [pin 10]
- OUT_2 [pin 11]
- SYSOFF [pin 15]
- TMR [pin 14]
- TS [pin 1]
- VSS [pin 8]
### IC2 — [BQ25504RGTR](https://www.flux.ai/vasyl/bq25504rgtr~g0l.md)
- Role Details: Harvester front end for solar or TENG input into storage path
- Manufacturer Part Number: BQ25504RGTR
- Manufacturer Name: Texas Instruments
- Datasheet URL: https://www.ti.com/general/docs/suppproductinfo.tsp?distId=10&gotoUrl=https%3A%2F%2Fwww.ti.com%2Flit%2Fgpn%2Fbq25504
- Role: Energy Harvesting
- Part Type: Integrated Circuit
- Implementation Details: Energy harvesting front end for supplemental power input into storage path. LBST-VIN_DC inductor L1 and VSTOR storage capacitor C23 are populated. VBAT_OK is routed to U5 for status monitoring. Source-side harvester transducer network and threshold optimization remain pending.
- Package: QFN
**Pins:**
- AVSS [pin 12]
- LBST [pin 16]
- OK_HYST [pin 9]
- OK_PROG [pin 10]
- OT_PROG [pin 5]
- PAD [pin 17]
- VBAT [pin 14]
- VBAT_OK [pin 11]
- VBAT_OV [pin 6]
- VBAT_UV [pin 8]
- VIN_DC [pin 2]
- VOC_SAMP [pin 3]
- VRDIV [pin 7]
- VREF_SAMP [pin 4]
- VSS [pin 1]
- VSS [pin 13]
- VSTOR [pin 15]
### J1 — [3220-10-0300-00](https://www.flux.ai/adrian95/3220-10-0300-00~4yk.md)
- Package: SMD
- Datasheet URL: https://www.cnctech.us/pdfs/3220-XX-0300-00_.pdf
- Role: Debug
- Manufacturer Part Number: 3220-10-0300-00
- Manufacturer Name: CNC Tech
- Role Details: 2x5 1.27mm SWD debug header for nRF5340 bring-up
- Implementation Details: 2x5 1.27 mm debug header wired for 3V3 reference, GND, SWDIO, SWDCLK, and NRESET. Remaining pins are reserved or grounded in this revision.
- Package or Case Code: CNC_3220-10-0300-00
- Part Type: Connector
**Pins:**
- 1 [pin 1]
- 10 [pin 10]
- 2 [pin 2]
- 3 [pin 3]
- 4 [pin 4]
- 5 [pin 5]
- 6 [pin 6]
- 7 [pin 7]
- 8 [pin 8]
- 9 [pin 9]
### U1 — [NDP120-WLBGA42](https://www.flux.ai/jharwinbarrozo/ndp120-wlbga42~of.md)
- Package: WLBGA-42
- Role: AI Co-Processor
- Part Type: AI Sensor
- Implementation Details: SPI-connected always-on inference engine. Primary pins used: power, ground, SPI host interface, reset, and interrupt. Unused audio, debug, I2C, alternate master SPI, crystal, and extra GPIO pins are intentionally left unconnected in this revision unless explicitly integrated later.
- Manufacturer Part Number: NDP120-WLBGA42
- Manufacturer Name: Syntiant
- Role Details: Handles low-power local inference, sensor feature extraction assistance, and adaptive personalization workloads.
**Pins:**
- AUD0_PCLK0/GPIO8
- AUD0_PCLK1/GPIO9
- AUD0_PDAT/GPIO10
- AUD1_PCLK0/GPIO11
- AUD1_PCLK1/GPIO12
- AUD1_PDAT_GPIO13
- AUD2_SCK/GPIO15
- AUD2_SDO/GPIO16
- AUD2_WS/GPIO14
- CIPO/SIO1/GPIO26
- COPI/SIO0
- GPIO22/DFT
- GPIO23
- GPIO24
- INT/GPIO19
- JTCK
- JTMS
- MSCK/GPIO3
- MSIO0/MCOPI/GPIO4
- MSIO1/MCIPO/GPIO5
- MSIO2/GPIO6
- MSIO3/GPIO7
- MSSB0/GPIO0
- MSSB1/GPIO1
- MSSB2/GPIO2
- PORSTB
- SCL/GPIO20
- SCLK
- SDA/GPIO21
- SIO2/GPIO17
- SIO3/GPIO18
- SSB
- VDD1
- VDD2
- VDDIO
- VDDIO/VDDXTAL
- VDDOTP
- VSSIO/VSS1
- VSSIO/VSS2
- VSSXTAL/VSSOTP
- XTALINN
- XTALINP/CLK
### U2 — [W25Q128JVSIQ](https://www.flux.ai/jecstronic/w25q128jvsiq~tqj.md)
- Manufacturer Name: Winbond Electronics
- Implementation Details: External flash for encrypted logs, model parameters, buffered uploads, and dual-image OTA staging. WP and HOLD pins are used as general IO in this revision and remain host-controlled.
- Manufacturer Part Number: W25Q128JVSIQ
- Role Details: Stores encrypted records, AI assets, upload buffers, and dual-image OTA firmware payloads.
- Package: 8-SOIC
- Role: External Flash Storage
- Part Type: Integrated Circuit
- Datasheet URL: https://www.winbond.com/resource-files/W25Q128JV%20RevI%2008232021%20Plus.pdf
**Pins:**
- ~CS [pin 1]
- CLK [pin 6]
- DI(IO0) [pin 5]
- DO(IO1) [pin 2]
- GND [pin 4]
- IO2 [pin 3]
- IO3 [pin 7]
- VCC [pin 8]
### U3 — [BG95M3LA64-SGNS](https://www.flux.ai/jecstronic/bg95m3la64-sgns~u77.md)
- Role: Cellular Modem
- License: https://creativecommons.org/licenses/by/4.0/
- Implementation Details: Cellular modem for cloud upload and emergency contact path. UART and control pins connected to U5. VDD_EXT is decoupled locally with C21 only and not used as a system rail. USB_BOOT, USB data, GNSS, PCM, SIM, debug, RF control, I2C, ADC, and unused GPIO expansion interfaces remain intentionally unconnected in this revision.
- Package: LGA Module
- Datasheet URL: https://www.quectel.com/wp-content/uploads/pdfupload/Quectel_BG95_Series_LPWA_Specification_V1.5.pdf
- Manufacturer Name: Quectel
- Part Type: Module
- Role Details: Provides secure cloud upload path for model-improvement data and remote firmware delivery.
- Manufacturer Part Number: BG95M3LA-64-SGNS
**Pins:**
- ~RESET [pin 17]
- ADC0 [pin 24]
- ADC1 [pin 2]
- ANT_GNSS [pin 49]
- ANT_MAIN [pin 60]
- AP_READY [pin 19]
- DBG_RXD [pin 22]
- DBG_TXD [pin 23]
- GND [pin 101]
- GND [pin 91]
- GND [pin 82]
- GND [pin 69]
- GND [pin 54]
- GND [pin 79]
- GND [pin 59]
- GND [pin 3]
- GND [pin 74]
- GND [pin 102]
- GND [pin 100]
- GND [pin 61]
- GND [pin 72]
- GND [pin 80]
- GND [pin 70]
- GND [pin 89]
- GND [pin 31]
- GND [pin 71]
- GND [pin 48]
- GND [pin 50]
- GND [pin 81]
- GND [pin 67]
- GND [pin 62]
- GND [pin 68]
- GND [pin 58]
- GND [pin 90]
- GND [pin 55]
- GND [pin 73]
- GNSS_RXD [pin 28]
- GNSS_TXD [pin 27]
- GPIO1 [pin 25]
- GPIO2 [pin 26]
- GPIO3 [pin 64]
- GPIO4 [pin 65]
- GPIO5 [pin 66]
- GPIO6 [pin 85]
- GPIO7 [pin 86]
- GPIO8 [pin 87]
- GPIO9 [pin 88]
- GRFC1 [pin 83]
- GRFC2 [pin 84]
- I2C_SCL [pin 40]
- I2C_SDA [pin 41]
- MAIN_CTS [pin 36]
- MAIN_DCD [pin 38]
- MAIN_DTR [pin 30]
- MAIN_RI [pin 39]
- MAIN_RTS [pin 37]
- MAIN_RXD [pin 34]
- MAIN_TXD [pin 35]
- NET_STATUS [pin 21]
- PCM_CLK [pin 4]
- PCM_DIN [pin 6]
- PCM_DOUT [pin 7]
- PCM_SYNC [pin 5]
- PON_TRIG [pin 96]
- PSM_IND [pin 1]
- PWRKEY [pin 15]
- RESERVED [pin 77]
- RESERVED [pin 76]
- RESERVED [pin 56]
- RESERVED [pin 57]
- RESERVED [pin 51]
- RESERVED [pin 13]
- RESERVED [pin 98]
- RESERVED [pin 92]
- RESERVED [pin 78]
- RESERVED [pin 93]
- RESERVED [pin 16]
- RESERVED [pin 97]
- RESERVED [pin 12]
- RESERVED [pin 14]
- RESERVED [pin 63]
- RESERVED [pin 11]
- RESERVED [pin 94]
- RESERVED [pin 95]
- RESERVED [pin 99]
- STATUS [pin 20]
- USB_BOOT [pin 75]
- USB_DM [pin 10]
- USB_DP [pin 9]
- USB_VBUS [pin 8]
- USIM_CLK [pin 46]
- USIM_DATA [pin 45]
- USIM_DET [pin 42]
- USIM_GND [pin 47]
- USIM_RST [pin 44]
- USIM_VDD [pin 43]
- VBAT_BB [pin 33]
- VBAT_BB [pin 32]
- VBAT_RF [pin 52]
- VBAT_RF [pin 53]
- VDD_EXT [pin 29]
- W_DISABLE# [pin 18]
### U4 — [ATECC608A-MAHDA-S](https://www.flux.ai/adrian95/atecc608a-mahda-s~86d.md)
- Part Type: Integrated Circuit
- Role Details: Stores device identity and keys for signed OTA validation, encrypted cloud credentials, and anti-cloning protection.
- Package: UDFN-8
- Manufacturer Name: Microchip Technology
- Datasheet URL: https://ww1.microchip.com/downloads/en/DeviceDoc/ATECC608A-CryptoAuthentication-Device-Summary-Data-Sheet-DS40001977B.pdf
- Manufacturer Part Number: ATECC608A-MAHDA-S
- License: https://creativecommons.org/licenses/by/4.0/
- Role: Secure Element
- Implementation Details: Root-of-trust device for cloud credentials and signed firmware verification. NC pins remain intentionally unconnected per datasheet.
**Pins:**
- EP [pin 9]
- GND [pin 4]
- NC [pin 2]
- NC [pin 7]
- NC [pin 1]
- NC [pin 3]
- SCL [pin 6]
- SDA [pin 5]
- VCC [pin 8]
### U5 — [NRF5340-CLAA-R7](https://www.flux.ai/adrian95/nrf5340-claa-r7~4d.md)
- Manufacturer Part Number: NRF5340-CLAA-R7
- Package or Case Code: BGA95C35P12X11_439X399X45
- License: https://creativecommons.org/licenses/by/4.0/
- Implementation Details: Primary wearable MCU in normal-voltage mode. VDD and VDDH tied to 3V3. Added DECD, DCCD/DCCH/DCC, DECR/DECRF, DECN, DECA, and DECUSB support capacitors; 32 MHz HFXO and 32.768 kHz LFXO; SWD header on SWDIO/SWDCLK/NRESET. Native USB D+ and D- are intentionally unused in this revision.
- Package: XFBGA-95
- Role Details: Dual-core wearable MCU coordinating NDP120 over SPI, W25Q128 over SPI, ATECC608A over I2C, BG95 over UART and control GPIOs, OTA updates, and future Wi-Fi companion integration.
- Role: Main Compute and Control
- Part Type: Integrated Circuit
- Integrated Circuit Type: RF Device
- Datasheet URL: https://infocenter.nordicsemi.com/pdf/nRF5340_PS_v1.1.pdf
- Manufacturer Name: Nordic Semiconductor
**Pins:**
- ANT [pin D1]
- AVSS_1 [pin G5]
- AVSS_2 [pin K6]
- AVSS_3 [pin K11]
- D- [pin A11]
- D+ [pin A12]
- DCC [pin B6]
- DCCD [pin A9]
- DCCH [pin D11]
- DECA [pin B8]
- DECD [pin A7]
- DECN [pin B5]
- DECR [pin B4]
- DECRF [pin B1]
- DECUSB [pin C11]
- NRESET [pin G2]
- P0.00/XL1 [pin F11]
- P0.01/XL2 [pin F12]
- P0.02/NFC1 [pin G11]
- P0.03/NFC2 [pin H12]
- P0.04/AIN0 [pin G10]
- P0.05/AIN1 [pin F10]
- P0.06/AIN2 [pin H10]
- P0.07/AIN3 [pin J10]
- P0.08/TRACEDATA3/SCK [pin L12]
- P0.09/TRACEDATA2/MOSI [pin J9]
- P0.10/TRACEDATA1/MISO [pin J8]
- P0.11/TRACEDATA0/CSN [pin J7]
- P0.12/TRACECLK/DCX [pin J6]
- P0.13/IO0 [pin K10]
- P0.14/IO1 [pin K9]
- P0.15/IO2 [pin L9]
- P0.16/IO3 [pin K8]
- P0.17/SCK [pin L7]
- P0.18/CSN [pin K7]
- P0.19 [pin J5]
- P0.20 [pin K5]
- P0.21 [pin J4]
- P0.22 [pin K4]
- P0.23 [pin H3]
- P0.24 [pin K2]
- P0.25/AIN4 [pin L1]
- P0.26/AIN5 [pin J2]
- P0.27/AIN6 [pin H1]
- P0.28/AIN7 [pin E3]
- P0.29 [pin E2]
- P0.30 [pin C4]
- P0.31 [pin C5]
- P1.00 [pin D10]
- P1.01 [pin E10]
- P1.02/TWI [pin J11]
- P1.03/TWI [pin K12]
- P1.04 [pin K3]
- P1.05 [pin L3]
- P1.06 [pin J3]
- P1.07 [pin G3]
- P1.08 [pin F3]
- P1.09 [pin H2]
- P1.10 [pin E4]
- P1.11 [pin C6]
- P1.12 [pin C7]
- P1.13 [pin C8]
- P1.14 [pin C9]
- P1.15 [pin C10]
- SWDCLK [pin F2]
- SWDIO [pin F1]
- VBUS [pin B11]
- VDD_1 [pin A3]
- VDD_2 [pin B7]
- VDD_3 [pin B10]
- VDD_4 [pin D2]
- VDD_5 [pin E11]
- VDD_6 [pin H11]
- VDD_7 [pin K1]
- VDD_8 [pin L5]
- VDD_9 [pin L11]
- VDDH [pin B12]
- VSS_1 [pin A5]
- VSS_10 [pin F5]
- VSS_11 [pin F6]
- VSS_12 [pin F7]
- VSS_13 [pin F8]
- VSS_14 [pin G6]
- VSS_15 [pin G7]
- VSS_16 [pin G8]
- VSS_2 [pin B2]
- VSS_3 [pin B9]
- VSS_4 [pin C2]
- VSS_5 [pin D12]
- VSS_6 [pin E5]
- VSS_7 [pin E6]
- VSS_8 [pin E7]
- VSS_9 [pin E8]
- XC1 [pin A1]
- XC2 [pin A2]
### U6 — [CC3100MODR11MAMOBR](https://www.flux.ai/lcsc/cc3100modr11mamobr~nwhu.md)
- Part Type: WiFi Modules
- Manufacturer Name: TI(德州仪器)
- Role: Wi-Fi Companion
- Role Details: SPI-hosted Wi-Fi module connected to U5 for routine data sync and OTA over Wi-Fi
- Manufacturer Part Number: CC3100MODR11MAMOBR
- Implementation Details: SPI-hosted Wi-Fi companion tied to 3V3 and connected to U5 for routine sync and OTA over Wi-Fi. Full boot, enable, RF, and host-flow-control support remains to be completed; reserved, test, and unused UART pins are intentionally left unconnected in this revision.
- Package: Module
- Package or Case Code: WIRELM-SMD_TI_CC3100MODR11MAMOBR
- LCSC Part Number: C544347
**Pins:**
- FORCE_AP [pin 10]
- GND [pin 60]
- GND [pin 57]
- GND [pin 16]
- GND [pin 43]
- GND [pin 28]
- GND [pin 56]
- GND [pin 62]
- GND [pin 55]
- GND [pin 63]
- GND [pin 27]
- GND [pin 2]
- GND [pin 61]
- GND [pin 1]
- GND [pin 38]
- GND [pin 59]
- GND [pin 32]
- GND [pin 30]
- GND [pin 58]
- HOST_INTR [pin 11]
- HOST_SPI_CLK [pin 5]
- HOST_SPI_DIN [pin 6]
- HOST_SPI_DOUT [pin 7]
- HOST_SPI_nCS [pin 8]
- NC [pin 12]
- NC [pin 41]
- NC [pin 45]
- NC [pin 54]
- NC [pin 29]
- NC [pin 42]
- NC [pin 25]
- NC [pin 17]
- NC [pin 9]
- NC [pin 3]
- NC [pin 15]
- NC [pin 18]
- NC [pin 33]
- NC [pin 20]
- NC [pin 14]
- NC [pin 39]
- NC [pin 53]
- NC [pin 13]
- NC [pin 22]
- NC [pin 26]
- nHIB [pin 4]
- nRESET [pin 35]
- RESERVED [pin 21]
- RESERVED [pin 19]
- RF_BG [pin 31]
- SOP0 [pin 34]
- SOP1 [pin 24]
- SOP2 [pin 23]
- TEST_58 [pin 48]
- TEST_59 [pin 49]
- TEST_60 [pin 50]
- TEST_62 [pin 52]
- UART1_nCTS [pin 51]
- UART1_nRTS [pin 44]
- UART1_RX [pin 47]
- UART1_TX [pin 46]
- VBAT_DCDC_ANA [pin 36]
- VBAT_DCDC_DIG_IO [pin 40]
- VBAT_DCDC_PA [pin 37]
### X1 — [NX1612SA-32MHZ-STD-CIS-3](https://www.flux.ai/lcsc/nx1612sa-32mhz-std-cis-3~ja2s.md)
- Package or Case Code: CRYSTAL-SMD_4P-L1.6-W1.2-BL
- Package: SMD
- Manufacturer Name: NDK
- Role: Timing
- Part Type: Crystals
- JLCPCB Part Class: Extended Part
- Manufacturer Part Number: NX1612SA-32MHZ-STD-CIS-3
- LCSC Part Number: C910049
- Role Details: 32 MHz high-frequency crystal for U5 XC1/XC2
**Pins:**
- 1 [pin 1]
- 3 [pin 3]
- GND [pin 4]
- GND [pin 2]
### Y1 — [ABS05-32.768KHZ-6-T](https://www.flux.ai/jecstronic/abs05-32p768khz-6-t~5gj.md)
- License: https://creativecommons.org/licenses/by/4.0/
- Package: SMD
- Part Type: Oscillator
- Datasheet URL: https://abracon.com/Resonators/ABS05.pdf
- Manufacturer Name: Abracon LLC
- Role Details: 32.768 kHz low-frequency crystal for U5 XL1/XL2
- Role: Timing
- Manufacturer Part Number: ABS05-32.768KHZ-6-T
**Pins:**
- P1 [pin 1]
- P2 [pin 2]
*The full schematic, PCB layout, bill of materials, and interactive design are available at [https://www.flux.ai/abilkus/advanced-health-smartwatch~ng](https://www.flux.ai/abilkus/advanced-health-smartwatch~ng).*
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*Generated from [https://www.flux.ai/abilkus/advanced-health-smartwatch~ng](https://www.flux.ai/abilkus/advanced-health-smartwatch~ng)*