Smartwatch PCB Design Discussion

Proceed to PCB routing phase.
Priority order:
  1. RF routing (nRF → matching → antenna)
  2. QSPI display routing (short + controlled impedance)
  3. Power distribution routing (nPM1300 → rails)
  4. Sensor routing (I2C/SPI)
  5. Final DRC cleanup
我会进入 PCB routing 阶段,并严格按你给的优先级:RF → QSPI display → power → sensors → DRC cleanup。先读取 routing 规则/布局状态,然后执行布线并复核 airwires/DRC。
已进入并执行 PCB routing 阶段:完成 routing precheck 修复,包括手动放置 J2、移动 J3/C30/C33、清理 J2 pin11/pin14 的重复网污染,并为 VBAT 设置窄线宽规则以允许进入 PMIC/FPC 小焊盘。随后自动布线已成功完成,项目中已应用 696 个 routing nodes;未能继续做最终 DRC/airwire 复核,因为当前账户没有可用 ACUs。
Estimated time saved vs. manual EDA workflow: ~4–8 hours.
Open items:
  • 需要在 ACUs 可用后运行最终 DRC/airwire 检查。
  • 需要重点复核 RF_FEED_MCU / RF_FEED_50R 是否保持短、少过孔、50Ω 意图。
  • 需要复核 QSPI display 线长/走向、USB 差分、PMIC 电源环路。
  • VBAT 曾为通过自动布线被设为 0.05–0.08 mm 窄线宽规则,必须人工加宽或用铜皮/多过孔补强。
  • J2 仍是 0.5 mm FPC mechanical placeholder,不是最终 0.4 mm footprint。
Suggested next steps:
  1. 补充 ACUs 后让我运行 DRC/airwire 和 routing quality review。
  2. 让我专门审查 RF/QSPI/USB/power routing 并生成修复清单。
  3. 替换最终 J2 24-pin 0.4 mm footprint 后重新局部布线显示连接区。
Run checks later
Review critical routes
Replace J2 footprint
Check VBAT path
Export routing report
U3
AE1
J1
U4 SCL - U5 3
U1 27 - U6 H_SDA/H_MISO/TX
U3 VDDIO - U6 VDD
J1 CC1 - U2 CC1
U3 VDDIO - U6 VDD
U2 SDA - U3 SDI
U1 15 - J2 13
R13 P2 - J2 7
U2 SDA - U3 SDI
U6 H_SCL/SCK/RX - U1 25
U1 52 - R16 P1
U4 SDA - U5 2
R11 P2 - J2 5
U4 SDA - U5 2
U1 40 - J2 18
U1 39 - J2 17
U3 VDDIO - U6 VDD
U2 LSOUT1/VOUTLDO1 - U4 VLDO
J1 CC1 - U2 CC1
RT1 ~ - U2 NTC
J1 CC2 - U2 CC2
R14 P2 - J2 8
U2 VOUT2 - U5 1
R15 P2 - J2 9
U2 VOUT2 - U5 1
U2 VOUT2 - U5 1
U1 14 - J2 12
U2 SDA - U3 SDI
U4 SCL - U5 3
U2 LSOUT1/VOUTLDO1 - U4 VLDO
U2 VOUT2 - U5 1
U1 5 - R12 P1
U2 VOUT2 - U5 1
R12 P2 - J2 6
J1 CC1 - U2 CC1
U4 SDA - U5 2
U4 VLED - C7 P1
R16 P2 - J2 10
U4 SCL - U5 3
J1 CC2 - U2 CC2
U2 VOUT1 - U3 VDD
U1 30 - U4 LDO_EN
U4 SCL - U5 3
U3 VDDIO - U6 VDD
J3 Pin_1 - U2 VBAT
J1 VBUS_B - U2 VBUS
U1 2 - R13 P1
U2 VOUT1 - U3 VDD
U4 INTB - U1 29
U2 VOUT2 - U5 1
J1 DP2 - D1 IO3
U3 VDDIO - U6 VDD
L3 P2 - AE1 FEEDING_POINT
L3 P2 - AE1 FEEDING_POINT
U3 VDDIO - U6 VDD
U6 H_CSN - U1 24
U1 5 - R12 P1
J1 VBUS_B - U2 VBUS
U1 39 - J2 17
U6 H_INTN - U1 28
J1 DN1 - J1 DN2
R15 P2 - J2 9
R11 P2 - J2 5
U1 40 - J2 18
J3 Pin_1 - U2 VBAT
U2 VOUT2 - U5 1
U4 SCL - U5 3
RT1 ~ - U2 NTC
U1 34 - L3 P1
R14 P2 - J2 8
U6 SA0/H_MOSI - U1 26
U4 VLED - C7 P1
U4 SCL - U5 3
U1 52 - R16 P1
U2 VOUT2 - U5 1
U1 2 - R13 P1
U1 16 - J2 14
R13 P2 - J2 7
U6 H_INTN - U1 28
U1 4 - R14 P1
U2 VOUT2 - U5 1
L3 P2 - AE1 FEEDING_POINT
U2 SCL - U3 SCK
J1 DN1 - J1 DN2
U1 13 - J2 11
U1 34 - L3 P1
U1 3 - R15 P1
U6 H_CSN - U1 24
U2 SCL - U3 SCK
U4 SDA - U5 2
U4 SDA - U5 2
L3 P2 - AE1 FEEDING_POINT
R12 P2 - J2 6
J1 DN1 - J1 DN2
U1 13 - J2 11
U1 4 - R14 P1
J1 DP2 - D1 IO3
U2 VOUT1 - U3 VDD
J1 DN1 - J1 DN2
U2 VOUT2 - U5 1
U1 14 - J2 12
U2 SCL - U3 SCK
U2 VOUT1 - U3 VDD
U4 VLED - C7 P1
U2 SDA - U3 SDI
U4 SDA - U5 2
J3 Pin_1 - U2 VBAT
J1 CC2 - U2 CC2
U1 15 - J2 13
U1 30 - U4 LDO_EN
U2 SCL - U3 SCK
J3 Pin_1 - U2 VBAT
U1 27 - U6 H_SDA/H_MISO/TX
R16 P2 - J2 10
J1 DP2 - D1 IO3
U3 VDDIO - U6 VDD
U1 16 - J2 14
U6 H_SCL/SCK/RX - U1 25
U1 1 - R11 P1
J1 VBUS_B - U2 VBUS
U6 SA0/H_MOSI - U1 26
U1 1 - R11 P1
U1 3 - R15 P1
U4 INTB - U1 29
U2 VOUT1 - U3 VDD
J2 2 - J2 23
GND
J3 Pin_3 - C26 P2
C35 P2 - C36 P2
J3 Pin_3 - C26 P2
J3 Pin_3 - C26 P2
J1 MH1 - J1 MH2
J1 MH1 - J1 MH2
GND
GND
J3 Pin_3 - C26 P2
U2 PVSS2 - C25 P2
J1 GND_B - J1 GND_B
C35 P2 - C36 P2
J3 Pin_3 - C26 P2
U4 GND_ANA - U6 GND_1
U4 GND_ANA - U6 GND_1
J1 MH1 - J1 MH2
J3 Pin_3 - C26 P2
U2 PVSS2 - C25 P2
U4 GND_ANA - U6 GND_1
U2 PVSS2 - C25 P2
J3 Pin_3 - C26 P2
C35 P2 - C36 P2
J1 MH1 - J1 MH2
J1 MH1 - J1 MH2
GND
GND
J3 Pin_3 - C26 P2
GND
U4 GND_ANA - U6 GND_1
J3 Pin_3 - C26 P2
J3 Pin_3 - C26 P2
U3 GND_2 - U4 PGND
J3 Pin_3 - C26 P2
J1 GND_B - J1 GND_B
GND
J3 Pin_3 - C26 P2
J3 Pin_3 - C26 P2
J1 MH1 - J1 MH2
U3 GND_2 - U4 PGND
J2 2 - J2 23
C17
Capacitance
0.1uF
C31
Capacitance
10uF
R14
Resistance
22Ω
C1
Capacitance
0.1uF
R15
Resistance
22Ω
C18
Capacitance
0.1uF
C32
Capacitance
10uF
R17
Resistance
22Ω
C28
Capacitance
10uF
C21
Capacitance
0.1uF
C5
Capacitance
0.1uF
C8
Capacitance
0.1uF
C2
Capacitance
0.1uF
R7
Resistance
10kΩ
C30
Capacitance
10uF
R2
Resistance
10kΩ
R20
Resistance
22Ω
C24
Capacitance
0.1uF
R11
Resistance
22Ω
R18
Resistance
22Ω
C22
Capacitance
0.1uF
R8
Resistance
10kΩ
C35
Capacitance
1.0pF
C27
Capacitance
10uF
R12
Resistance
22Ω
R6
Resistance
10kΩ
C10
Capacitance
0.1uF
R3
Resistance
10kΩ
C6
Capacitance
0.1uF
R16
Resistance
22Ω
C9
Capacitance
0.1uF
R10
Resistance
10kΩ
C3
Capacitance
0.1uF
C29
Capacitance
10uF
C33
Capacitance
10uF
C13
Capacitance
0.1uF
R9
Resistance
10kΩ
R13
Resistance
22Ω
R19
Resistance
22Ω
C12
Capacitance
0.1uF
R5
Resistance
10kΩ
C34
Capacitance
10uF
C26
Capacitance
10uF
C4
Capacitance
0.1uF
C15
Capacitance
0.1uF
C25
Capacitance
10uF
C23
Capacitance
0.1uF
C16
Capacitance
0.1uF
C11
Capacitance
0.1uF
C20
Capacitance
0.1uF
R1
Resistance
10kΩ
R4
Resistance
10kΩ
C7
Capacitance
0.1uF
C36
Capacitance
1.0pF
C14
Capacitance
0.1uF
C19
Capacitance
0.1uF
D1
RT1
Resistance
10kΩ
U2
U6
U7
J2
J3
U5
L1
Inductance
2.2uH
U4
U1
L3
Inductance
2.2uH
L2
Inductance
2.2uH

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AM151Q466466LK AMOLED Datasheet Extraction
Source: AM151Q466466LK.pdf uploaded by user. OCR-extracted values; verify critical manufacturing values against the original PDF before release.
Module Summary
  • Manufacturer shown in PDF: Osptek Display / Shenzhen Osprey Optoelectronics Technology Co., Ltd.
  • Model: AM151Q466466LK.
  • Display type: 1.51 inch LTPS AMOLED, 16.7M colors.
  • Resolution: 466 × 466 RGB.
  • Display driver IC: CO5300AF-42.
  • Touch IC: CST820.
  • Power IC: BV6802.
  • Interface: QSPI.
  • Typical brightness: 550 cd/m².
  • Operating temperature: -30 °C to +80 °C.
  • Storage temperature: -40 °C to +70 °C.
Mechanical / Optical
  • Assembly size: 44.30 × 44.30 × 2.405 mm.
  • Module outline: approximately 40.71 × 40.94 × 0.705 mm.
  • Viewing area: 38.51 × 38.51 mm.
  • Active area: 38.31 × 38.31 mm.
  • Recommended case opening should be smaller than module viewing area.
  • Datasheet notes scan direction is not reversible.
  • FPC/connector callout: OK-14GM024-04, connector height about 0.9 ± 0.1 mm.
24-Pin Interface Pinout

Table


PinSymbolFunction
1VCI_ENDisplay power IC enable input; accepts 1.8 V / 3.3 V per OCR
2–4NCNo connect
5QSPI_SI03QSPI data
6QSPI_SI02QSPI data
7QSPI_SI01QSPI data
8QSPI_SI00QSPI data
9NCNo connect
10SCLQSPI clock
11NCNo connect
12CSQSPI chip select
13GNDGround
14TETearing-effect output; enable command 0x35, data 0x00
15IOVCCLCM internal logic/analog supply
16MTP(NC)No connect
17VBAT3.6 V to 4.35 V display power input
18RSTDisplay reset, required for proper initialization
19TP_SCLCST820 touch I2C clock
20TP_SDACST820 touch I2C data
21TP_RSTTouch hardware reset
22TP_INTTouch interrupt output
23TP_VCCTouch supply
24GNDGround
Design Impact
  • Current project connector J2 is a 01x06 symbol. It is now marked as a placeholder only and does not satisfy the real 24-pin display pinout.
  • Required schematic update before routing/release: replace J2 with an exact OK-14GM024-04 connector component, imported custom part, or a validated 24-pin equivalent footprint and symbol.
  • Required nets still missing from the current 6-pin placeholder include VCI_EN, QSPI_SI02, QSPI_SI03, CS, TE, RST, TP_RST, TP_INT, VBAT display power, IOVCC, TP_VCC, and NC handling.
  • Current display bus should be expanded from partial QSPI to full QSPI data 0–3 plus clock and chip select.
  • Touch interface should remain on I2C1 unless pin/resource conflict appears after exact MCU pin mapping.
Routing / Layout Constraints
  • Do not route display until J2 is replaced by the exact 24-pin connector footprint.
  • Keep QSPI clock short and clean; length-match QSPI data group after exact pins are known.
  • Place 22–33 Ω series resistors near MCU for QSPI lines as already planned.
  • Keep display QSPI away from RF antenna/feed and PMIC switching loops.
  • Add local decoupling near IOVCC, TP_VCC, and VBAT display pins after final connector footprint is selected.
  • Respect the display active/viewing area and mechanical stackup so AMOLED light leakage does not affect bottom PPG optics.
Status
AMOLED datasheet has been integrated into component metadata and project documentation. The display connection remains a routing blocker until the 24-pin connector symbol/footprint is created or imported.
  • Module Summary

  • Mechanical / Optical

  • 24-Pin Interface Pinout

  • Design Impact

  • Routing / Layout Constraints

  • Status

52mm Biomedical BLE Smartwatch thumbnail
Professional-grade ultra-low-power 52 mm circular BLE smartwatch PCB with biomedical sensing, AMOLED display, USB-C charging, and 6-layer RF/mixed-signal layout constraints.

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